AT45DB021D-SH-B Atmel, AT45DB021D-SH-B Datasheet - Page 20

IC FLASH 2MBIT 66MHZ 8SOIC

AT45DB021D-SH-B

Manufacturer Part Number
AT45DB021D-SH-B
Description
IC FLASH 2MBIT 66MHZ 8SOIC
Manufacturer
Atmel
Datasheets

Specifications of AT45DB021D-SH-B

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
2M (1024 pages x 264 bytes)
Speed
66MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Architecture
Sectored
Interface Type
SPI Serial
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
32 KB x 8
Memory Configuration
1024 Pages X 264 Bytes
Clock Frequency
66MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOIC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT45DB021D-SU
AT45DB021D-SU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT45DB021D-SH-B
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
10.
10.1
20
Table 9-1.
Deep Power-down
After initial power-up, the device will default in standby mode. The Deep Power-down command allows the device
to enter into the lowest power consumption mode. To enter the Deep Power-down mode, the CS pin must first be
asserted. Once the CS pin has been asserted, an opcode of B9H command must be clocked in via input pin (SI).
After the last bit of the command has been clocked in, the CS pin must be de-asserted to initiate the Deep Power-
down operation. After the CS pin is de-asserted, the will device enter the Deep Power-down mode within the
maximum t
for the Resume from Deep Power-down command.
Table 10-1.
Figure 10-1. Deep Power-down
Resume from Deep Power-down
The Resume from Deep Power-down command takes the device out of the Deep Power-down mode and returns it
to the normal standby mode. To Resume from Deep Power-down mode, the CS pin must first be asserted and an
opcode of ABH command must be clocked in via input pin (SI). After the last bit of the command has been clocked
in, the CS pin must be de-asserted to terminate the Deep Power-down mode. After the CS pin is de-asserted, the
device will return to the normal standby mode within the maximum t
the t
will return to the normal standby mode.
Table 10-2.
Figure 10-2. Resume from Deep Power-Down
Command
Deep Power-down
CS
Command
Resume from Deep Power-down
CS
Atmel AT45DB021D
RDY/BUSY
SI
SI
RDPD
Bit 7
Each transition
represents 8 bits
Each transition
represents 8 bits
time before the device can receive any commands. After resuming form Deep Power-down, the device
EDPD
Status Register Format
Deep Power-down
Resume from Deep Power-down
time. Once the device has entered the Deep Power-down mode, all instructions are ignored except
Opcode
Opcode
COMP
Bit 6
Bit 5
0
Bit 4
1
Bit 3
0
Bit 2
1
PROTECT
RDPD
Bit 1
Opcode
B9H
Opcode
time. The CS pin must remain high during
ABH
PAGE SIZE
Bit 0
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