MT46H8M16LFCF-10 IT TR Micron Technology Inc, MT46H8M16LFCF-10 IT TR Datasheet - Page 16

• Manufacturer Part Number: MT46H8M16LFCF-10 IT TR
• Description: IC DDR SDRAM 128MBIT 60VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT46H8M16LFCF-10 IT TR

• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 60-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DESELECT
NO OPERATION (NOP)
LOAD MODE REGISTER
ACTIVE
READ
WRITE
PRECHARGE
PDF: 09005aef8199c1ec/Source: 09005aef81a19319
MT46H8M16LF_1.fm - Rev. K 7/07 EN
The DESELECT function (CS# HIGH) prevents new commands from being executed by
the Mobile DDR SDRAM. The Mobile DDR SDRAM is effectively deselected. Operations
already in progress are not affected.
The NO OPERATION (NOP) command is used to instruct the selected DDR SDRAM to
perform a NOP (CS# = LOW, RAS# = CAS# = WE# = HIGH). This prevents unwanted
commands from being registered during idle or wait states. Operations already in
progress are not affected.
The mode registers are loaded via inputs A0–A11. See mode register descriptions in
“Register Definition” on page 9. The LOAD MODE REGISTER command can only be
issued when all banks are idle, and a subsequent executable command cannot be issued
until
The ACTIVE command is used to open (or activate) a row in a particular bank for a
subsequent access. The value on the BA0, BA1 inputs selects the bank, and the address
provided on inputs A0–A11 selects the row. This row remains active (or open) for
accesses until a PRECHARGE command is issued to that bank. A PRECHARGE
command must be issued before opening a different row in the same bank.
The READ command is used to initiate a burst read access to an active row. The value on
the BA0, BA1 inputs selects the bank, and the address provided on inputs A0–A8 selects
the starting column location. The value on input A10 determines whether or not auto
precharge is used. If auto precharge is selected, the row being accessed will be
precharged at the end of the READ burst; if auto precharge is not selected, the row will
remain open for subsequent accesses.
The WRITE command is used to initiate a burst write access to an active row. The value
on the BA0, BA1 inputs selects the bank, and the address provided on inputs A0–Ai
(where i = 8 for x16) selects the starting column location. The value on input A10 deter-
mines whether or not auto precharge is used. If auto precharge is selected, the row being
accessed will be precharged at the end of the WRITE burst; if auto precharge is not
selected, the row will remain open for subsequent accesses. Input data appearing on the
DQs is written to the memory array subject to the DM input logic level appearing coinci-
dent with the data. If a given DM signal is registered LOW, the corresponding data will be
written to memory; if the DM signal is registered HIGH, the corresponding data inputs
will be ignored, and a WRITE will not be executed to that byte/column location.
The PRECHARGE command is used to deactivate the open row in a particular bank or
the open row in all banks. The bank(s) will be available for a subsequent row access a
specified time (
t
MRD is met.
t
RP) after the precharge command is issued. Except in the case of
16
128Mb: 8 Meg x 16 Mobile DDR SDRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
Commands