MT48H8M16LFB4-8 IT:J TR Micron Technology Inc, MT48H8M16LFB4-8 IT:J TR Datasheet - Page 68

• Manufacturer Part Number: MT48H8M16LFB4-8 IT:J TR
• Description: IC SDRAM 128MBIT 125MHZ 54VFBGA
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M16LFB4-8 IT:J TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 125MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 54-VFBGA
• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 8/6ns
• Maximum Clock Rate: 125MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 50mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1236-2

Figure 47:
AUTO REFRESH
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
Command
BA0, BA1
Address
DQM
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
Bank
T0
Row
Row
Single WRITE Without Auto Precharge
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
Notes:
t CK
T1
NOP
1. For this example, BL = 1 and the WRITE burst is followed by a manual PRECHARGE.
The AUTO REFRESH command is used during normal operation of the SDRAM to
refresh the contents of the SDRAM array. This command is non persistent, so it must be
issued each time a refresh is required. All active banks must be precharged prior to
issuing an AUTO REFRESH command. The AUTO REFRESH command should not be
issued until the minimum
is generated by the internal refresh controller. This makes the address bits “Don’t Care”
during an AUTO REFRESH command.
After the AUTO REFRESH command is initiated, it must not be interrupted by any
executable command until
or NOP commands must be issued on each positive edge of the clock. The SDRAM
requires that every row be refreshed each
REFRESH command—calculated by dividing the refresh period (
rows to be refreshed—meets the timing requirement and ensures that each row is
refreshed. Alternatively, a burst refresh can be employed after every
issuing consecutive AUTO REFRESH commands for the number of rows to be refreshed
at the minimum cycle rate (
Disable auto precharge
t CL
t CMS
t DS
Column m
Din m
Bank
T2
WRITE
t CMH
t DH
t CH
t WR
T3
NOP
t
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
RP is met following the PRECHARGE command. Addressing
t
t
RFC has been met. During
RFC)—to satisfy the refresh requirement.
68
T4
NOP
Single bank
Micron Technology, Inc., reserves the right to change products or specifications without notice.
All banks
PRECHARGE
Bank
T5
t
REF period. Providing a distributed AUTO
T6
t RP
NOP
t
RFC time, COMMAND INHIBIT
©2008 Micron Technology, Inc. All rights reserved.
Bank
Row
ACTIVE
T7
t
REF) by the number of
Timing Diagrams
t
REF period—by
T8
NOP
Don’t Care