M25P20-VMN6 NUMONYX, M25P20-VMN6 Datasheet - Page 12

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M25P20-VMN6

Manufacturer Part Number
M25P20-VMN6
Description
IC FLASH 2MBIT 50MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet

Specifications of M25P20-VMN6

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
2M (256K x 8)
Speed
50MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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M25P20
Write Enable (WREN)
The Write Enable (WREN) instruction
sets the Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set pri-
or to every Page Program (PP), Sector Erase
Figure 8. Write Enable (WREN) Instruction Sequence
Write Disable (WRDI)
The Write Disable (WRDI) instruction
resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by
driving Chip Select (S) Low, sending the instruc-
tion code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under
the following conditions:
Figure 9. Write Disable (WRDI) Instruction Sequence
12/40
S
C
D
Q
S
C
D
Q
(Figure
(Figure
High Impedance
0
High Impedance
0
1
1
8.)
9.)
2
2
Instruction
Instruction
3
3
4
(SE), Bulk Erase (BE) and Write Status Register
(WRSR) instruction.
The Write Enable (WREN) instruction is entered
by driving Chip Select (S) Low, sending the in-
struction code, and then driving Chip Select (S)
High.
4
5
5
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction
completion
Page Program (PP) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
6
6
7
7
AI02281E
AI03750D

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