NAND256W3A2BN6F STMicroelectronics, NAND256W3A2BN6F Datasheet - Page 14

• Manufacturer Part Number: NAND256W3A2BN6F
• Description: IC FLASH 256MBIT 48TSOP
• Manufacturer: STMicroelectronics

Specifications of NAND256W3A2BN6F

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 256M (32M x 8)
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

Memory array organization
2
2.1
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Memory array organization
The memory array comprises NAND structures where 16 cells are connected in series.
The memory array is organized in blocks where each block contains 32 pages. The array is
split into two areas, the main area and the spare area. The main area of the array stores
data, whereas the spare area is typically used to store error correction codes, software flags
or bad block identification.
In x8 devices the pages are split into a main area with two half pages of 256 bytes each and
a spare area of 16 bytes. In the x16 devices the pages are split into a 256-word main area
and an 8-word spare area. Refer to
Bad blocks
The NAND flash 528-byte/264-word page devices may contain bad blocks, that is blocks
that contain one or more invalid bits whose reliability is not guaranteed. Additional bad
blocks may develop during the lifetime of the device.
The bad block information is written prior to shipping (refer to
more details).
Table 4
include both the bad blocks that are present when the device is shipped and the bad blocks
that could develop later on.
These blocks need to be managed using bad blocks management, block replacement or
error correction codes (refer to
Table 4.
shows the minimum number of valid blocks in each device. The values shown
Density of device
Valid blocks
256 Mbits
128 Mbits
Section 7: Software
Figure 7: Memory array
Minimum
2008
1004
algorithms).
organization.
Section 2.1: Bad blocks
NAND128-A, NAND256-A
Maximum
2048
1024
for