TC58FVM6B2ATG-65 Toshiba, TC58FVM6B2ATG-65 Datasheet

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TC58FVM6B2ATG-65

Manufacturer Part Number
TC58FVM6B2ATG-65
Description
IC FLASH 64MBIT 65NS 48TSOP
Manufacturer
Toshiba
Datasheet

Specifications of TC58FVM6B2ATG-65

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
64M (8Mx8, 4Mx16)
Speed
65ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
64MBIT (8M × 8 BITS / 4M × 16 BITS) CMOS FLASH MEMORY
DESCRIPTION
memory organized as 8388608 words × 8 bits or as 4194304 words × 16 bits. The TC58FVM6T2A/B2A features
commands for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands
are based on the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The
TC58FVM6T2A/B2A also features a Simultaneous Read/Write operation so that data can be read during a Write or
Erase operation.
FEATURES
The TC58FVM6T2A/B2A is a 67108864-bit, 3.0-V read-only electrically erasable and programmable flash
Power supply voltage
Operating temperature
Organization
Functions
V
Ta = −40°C~85°C
8M × 8 bits/4M × 16 bits
Simultaneous Read/Write
Page Read
Auto Program, Auto Page Program
Auto Block Erase, Auto Chip Erase
Fast Program Mode/Acceleration Mode
Program Suspend/Resume
Erase Suspend/Resume
data polling/Toggle bit
block protection, boot block protection
Automatic Sleep, support for hidden ROM area
common flash memory interface (CFI)
Byte/Word Modes
DD
= 2.3 V~3.6 V
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
Block erase architecture
Boot block architecture
Mode control
Erase/Program cycles
Access Time (Random/Page)
Power consumption
Package
8 × 8 Kbytes/127 × 64 Kbytes
TC58FVM6T2A: top boot block
TC58FVM6B2A: bottom boot block
Compatible with JEDEC standard commands
10
10 µA
15 mA (Program/Erase operation)
55 mA (Random Read operation)
11 mA (Address Increment Read operation)
5 mA
TC58FVM6**AFT:
TC58FVM6**AXB:
2.7~3.6 V
2.3~3.6 V
5
TSOPI48-P-1220-0.50 (weight: 0.51 g)
P-TFBGA56-0710-0.80AZ (weight: 0.125 g)
cycles typ.
V
DD
(Standby)
(Page Read operation)
TC58FVM6(T/B)2A(FT/XB)65
65 ns/25 ns
70 ns/30 ns
CL = 30 pF
CL = 100 pF
2002-10-24 1/61
70 ns/30 ns
75 ns/35 ns

Related parts for TC58FVM6B2ATG-65

TC58FVM6B2ATG-65 Summary of contents

Page 1

... TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 64MBIT (8M × 8 BITS / 4M × 16 BITS) CMOS FLASH MEMORY DESCRIPTION The TC58FVM6T2A/B2A is a 67108864-bit, 3.0-V read-only electrically erasable and programmable flash memory organized as 8388608 words × 8 bits or as 4194304 words × 16 bits. The TC58FVM6T2A/B2A features commands for Read, Program and Erase operations to allow easy interfacing with microprocessors ...

Page 2

... Design rule A = 0.16 µm Function/Boot block architecture/Bank ratio T2 = Page mode/Top boot block/1:3:3 Page mode/Bottom boot block/1:3:3:1 Capacity M6 = 64Mbits Supply Voltage system Device type F = NOR Flash memory 2 Toshiba CMOS E PROM Boot block Bank ratio Top Bottom 1:3:3:1 Top Bottom Package TSOPI48-P-1220-0.50 P-TFBGA56-0710-0.80AZ ...

Page 3

PIN ASSIGNMENT (TOP VIEW) A15 1 A14 2 A13 3 A12 4 A11 5 A10 A19 9 A20 RESET 12 A21 13 WP /ACC A18 16 A17 ...

Page 4

... BLOCK DIAGRAM /ACC Control Circuit WE BYTE RESET CE Command Register OE A0 A21 A-1 TC58FVM6(T/B)2A(FT/XB) Buffer Memory Cell Memory Cell Memory Cell Array Array Array Bank0 Bank1 Bank2 DQ0 DQ15 I/O Buffer Data Latch Memory Cell Array Bank3 2002-10-24 4/61 ...

Page 5

MODE SELECTION MODE CE Read / Page Read ID Read (Manufacturer Code) ID Read (Device Code) Standby Output Disable Write Block Protect 1 Verify Block Protect Temporary Block Unprotect Hardware Reset / Standby Boot Block Protect Notes ...

Page 6

COMMAND SEQUENCES BUS FIRST BUS COMMAND WRITE WRITE CYCLE SEQUENCE CYCLES Addr. REQ’D Read/Reset 1 XXXh Word 555h Read/Reset 3 Byte AAAh Word 555h ID Read 3 Byte AAAh Word 555h Auto-Program 4 Byte AAAh Word 11 555h Auto PageProgram ...

Page 7

... READ MODE ( PAGE READ ) To read data from the memory cell array, set the device to Read Mode. In Read Mode the device can perform high-speed random access and Page Read as asynchronous ROM. The device is automatically set to Read Mode immediately after power- completion of automatic operation ...

Page 8

... Write cycle of the Command cycle. To read an ID code, the bank address as well as the ID read address must be specified. The maker code is output from address BK + 00; the device code is output from address BK + 01. From other banks data are output from the memory cells. Inputting a Reset command releases ID Read Mode and returns the device to Read Mode. ...

Page 9

Command Write The TC58FVM6T2A/B2A uses the standard JEDEC control commands for a single-power supply E Command Write is executed by inputting the address and data into the Command Register. The command is written by inputting a pulse to WE with ...

Page 10

... The device allows programmed into memory cells which contain cannot be programmed into cells which contain 0s. If this is attempted, execution of Auto Program will fail. This is a user error, not a device error ...

Page 11

... The Auto Chip Erase Mode is set using the Chip Erase command. An Auto Chip Erase operation starts on the rising edge the sixth bus cycle. All memory cells are automatically preprogrammed to 0, erased and verified as erased by the chip. The device status is indicated by the Hardware Sequence flag. ...

Page 12

... Command Register and enter Read Mode. The Erase Hold Time restarts on each successive rising edge Once operation starts, all memory cells in the selected block are automatically preprogrammed to 0, erased and verified as erased by the chip. The device status is indicated by the setting of the Hardware Sequence flag ...

Page 13

BLOCK PROTECTION Block Protection is a function for disabling writing and erasing specific blocks. Block protection can be carried out in two ways: by supplying a high voltage (V voltage and a command sequence (see Block protection 2). (1) Block ...

Page 14

... Hidden ROM Area The TC58FVM6T2A/B2A features a 64-Kbyte hidden ROM area which is separate from the memory cells. The area consists of one block. Data Read, Write and Protect can be performed on this block. Because Protect cannot be released, once the block is protected, data in the block cannot be overwritten. ...

Page 15

... COMMON FLASH MEMORY INTERFACE (CFI) The TC58FVM6T2A/B2A conforms to the CFI specifications. To read information from the device, input the Query command followed by the address. In Word Mode DQ8~DQ15 all output 0s. To exit this mode, input the Reset command. CFI CODE TABLE ADDRESS A6~A0 ...

Page 16

ADDRESS A6~A0 DATA DQ15~DQ0 2Ch 0002h 2Dh 0007h 2Eh 0000h 2Fh 0020h 30h 0000h 31h 007Eh 32h 0000h 33h 0000h 34h 0001h 40h 0050h 41h 0052h 42h 0049h 43h 0031h 44h 0031h 45h 0000h 46h 0002h 47h 0001h 48h 0001h ...

Page 17

ADDRESS A6~A0 DATA DQ15~DQ0 57h 0004h 58h 00XXh 59h 00XXh 5Ah 00XXh 5Bh 00XXh TC58FVM6(T/B)2A(FT/XB)65 DESCRIPTION Bank Organization 00h : Data at 4Ah is zero X: Number of Banks Bank0 Region information X = Number of blocks in Bank0 TOP: ...

Page 18

HARDWARE SEQUENCE FLAGS The TC58FVM6T2A/B2A has a Hardware Sequence flag which allows the device status to be determined during an auto mode operation. The output data is read out using the same timing as that used when ...

Page 19

... The Toggle bit begins toggling on the rising edge the last bus cycle. DQ6 alternately outputs for each OE access while has been completed, toggling stops and valid memory cell data can be read by subsequent reading. If the operation fails, the DQ6 output toggles. ...

Page 20

... Then, even if a proper command is input, the device may not operate. To avoid this possibility, clear the Command Register before command input environment prone to system noise, Toshiba recommend input of a software or hardware reset before command input. ...

Page 21

ABSOLUTE MAXIMUM RATINGS SYMBOL V V Supply Voltage Input Voltage IN V Input/Output Voltage DQ V Maximum Input Voltage for A9, OE and RESET IDH V Maximum Input Voltage for ACCH P Power Dissipation D T Soldering ...

Page 22

DC CHARACTERISTICS SYMBOL PARAMETER I Input Leakage Current LI I Output Leakage Current LO V Output High Voltage OH V Output Low Voltage OL V Average Random Read DD I DDO1 Current I V Average Program Current V DDO2 DD ...

Page 23

AC CHARACTERISTICS AND OPERATING CONDITIONS READ CYCLE Product name VDD voltage (V) Output load capacitance (CL) SYMBOL PARAMETER t Read Cycle Time RC t Page Read Cycle Time PRC t Address Access Time ACC t CE Access Time CE t ...

Page 24

COMMAND WRITE/PROGRAM/ERASE CYCLE SYMBOL t Command Write Cycle Time CMD Address Set-up Time / BYTE Set-up Time tAS t Address Hold Time / BYTE Hold Time AH t Address Hold Time from WE High level AHW t Data Set-up Time ...

Page 25

TIMING DIAGRAMS Read / ID Read Operation Address AHW t WE OEH D OUT ID Read Operation (apply OUT ...

Page 26

Page Read Operation Address(A3-21))) Address(0- OUT Hi-Z Read after command input ( Only Hidden Rom / CFI Read) Last command address Address Command data D OUT TC58FVM6(T/B)2A(FT/XB) PRC RC t ACC ...

Page 27

Command Write Operation This is the timing of the Command Write Operation. The timing which is described in the following pages is essentially the same as the timing shown on this page. • WE Control Address ...

Page 28

ID Read Operation (input command sequence) Address 555h t CMD OES WE AAh OUT Read Mode (input of ID Read command sequence) (Continued) Address 555h t CMD AAh ...

Page 29

Auto-Program Operation ( WE Address 555h t CMD OES WE D AAh IN D OUT t VDS V DD Note: Word Mode address shown. PA: Program address PD: Program data TC58FVM6(T/B)2A(FT/XB)65 Control) 2AAh 555h PA 55h A0h ...

Page 30

Auto Page Program Operation ( Address(A3-21) 555h 2AAh Address(A0- OES WE AAh 55h OUT t VDS V DD Note: Word Mode address shown. PA: Program address PD: Program Data WE Control CMD ...

Page 31

Auto Chip Erase / Auto Block Erase Operation ( Address 555h t CMD OES WE D AAh IN t VDS V DD Note: Word Mode address shown. BA: Block address for Auto Block Erase operation CE Auto-Program ...

Page 32

Auto Page Program Operation ( Address(A3-21) 555h 2AAh Address(A0- OES WE AAh 55h OUT t VDS V DD Note: Word Mode address shown. PA: Program address PD: Program data Control CMD ...

Page 33

Auto Chip Erase / Auto Block Erase Operation ( Address 555h t CMD OES WE D AAh IN t VDS V DD Note: Word Mode address shown. BA: Block address for Auto Block Erase operation TC58FVM6(T/B)2A(FT/XB)65 CE ...

Page 34

Program/Erase Suspend Operation BK Address B0h D IN Hi-Z D OUT Program/Erase Mode RA: Read address Program/Erase Resume Operation Address OES WE t DF1 t DF2 ...

Page 35

during Auto Program/Erase Operation Hardware Reset Operation WE RESET RESET Read after Address RESET D OUT TC58FVM6(T/B)2A(FT/XB)65 Command input sequence READY ...

Page 36

BYTE during Read Operation CE t CEBTS OE BYTE DQ0~DQ7 DQ8~DQ14 DQ15/A-1 BYTE during Write Operation CE WE BYTE TC58FVM6(T/B)2A(FT/XB)65 t BTD Data Output Data Output Data Output t ACC Data Output Address Input 2002-10-24 36/61 ...

Page 37

DATA Hardware Sequence Flag ( Last Address Command Address t CMD Last D Command IN Data DQ7 DQ0~DQ6 t BUSY PA: Program address BA: Block address Hardware Sequence Flag (Toggle bit) Address CE t ...

Page 38

Block Protect 1 Operation Address VPT VPS WE t CESP CE D OUT BA: Block address *: 01H indicates that block is protected. TC58FVM6(T/B)2A(FT/XB)65 Block ...

Page 39

Block Protect 2 Operation Address t CMD VPS RESET D 60h IN D OUT BA: Block address Address of next block *: 01h indicates that block ...

Page 40

FLOWCHARTS Auto-Program Address = Address + 1 Note: The above command sequence takes place in Word Mode. TC58FVM6(T/B)2A(FT/XB)65 Start Auto-Program Command Sequence (see below) DATA Polling or Toggle Bit No Last Address? Yes Auto-Program Completed Auto-Program Command Sequence (address/data) 555h/AAh ...

Page 41

Auto-Page Program Address = Address + 1 Program address (A2=0,A1=0,A0=0) / Program data Program address (A2=0,A1=0,A0=1) / Program data Program address (A2=0,A1=1,A0=0) / Program data Program address (A2=0,A1=1,A0=1) / Program data TC58FVM6(T/B)2A(FT/XB)65 START Auto page program command sequence ( see ...

Page 42

Fast Program Address = Address + 1 Fast Program Set Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/20h TC58FVM6(T/B)2A(FT/XB)65 Start Fast Program Set Command Sequence (see below) Fast Program Command Sequence (see below) DATA Polling or Toggle Bit No Last Address? Yes ...

Page 43

Auto Erase Auto Chip Erase Command Sequence (address/data) 555h/AAh 2AAh/55h 555h/80h 555h/AAh 2AAh/55h 555h/10h Note: The above command sequence takes place in Word Mode. TC58FVM6(T/B)2A(FT/XB)65 Start Auto Erase Command Sequence (see below) DATA Polling or Toggle Bit Auto Erase Completed ...

Page 44

DQ7 DATA Polling Start Read Byte (DQ0~DQ7) Addr DQ7 = Data? No DQ5 = 1? Read Byte (DQ0~DQ7) Addr DQ7 = Data? Fail DQ6 Toggle Bit Start Read Byte (DQ0~DQ7) Addr DQ6 = Toggle? ...

Page 45

Block Protect 1 PLSCNT = 1 Set up Block Address Addr. = BPA Wait for 4 µ Wait for 4 µs Wait for 100 µs Wait for 4 µs Wait for 4 µs Verify Block ...

Page 46

Block Protect 2 RESET = V Wait for 4 µs PLSCNT = 1 Block Protect 2 Command First Bus Write Cycle (XXXH/60H) Set up Address Addr. = BPA Block Protect 2 Command Second Bus Write Cycle Wait for 100 µs ...

Page 47

BLOCK ADDRESS TABLES (1) TC58FVM6T2A (top boot block) BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA0 L L BA1 L L BA2 L L BA3 L L BA4 L L BA5 ...

Page 48

BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA32 BA33 BA34 BA35 BA36 BA37 ...

Page 49

BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA64 BA65 BA66 BA67 BA68 BA69 ...

Page 50

BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA96 BA97 BA98 BA99 BA100 BA101 ...

Page 51

BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 H BA127 H H BA128 BA129 BA130 BK3 BA131 BA132 H H ...

Page 52

TC58FVM6B2A (bottom boot block) BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA0 BA1 BA2 BA3 BA4 L L ...

Page 53

BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA31 BA32 BA33 BA34 BA35 BA36 ...

Page 54

BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA63 BA64 BA65 BA66 BK1 BA67 BA68 L H ...

Page 55

BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA95 BA96 BA97 BA98 BA99 BA100 ...

Page 56

BANK BLOCK BANK ADDRESS # # A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 BA127 BA128 BA129 BA130 BK3 BA131 BA132 H H ...

Page 57

BLOCK SIZE TABLE (1) TC58FVM6T2A (top boot block) BLOCK SIZE BLOCK # BYTE MODE BYTE MODE BA0~BA15 64 Kbytes BA16~BA63 64 Kbytes BA64~BA111 64 Kbytes BA112~BA126 64 Kbytes BA127~BA134 8 Kbytes (2) TC58FVM6B2A (bottom boot block) BLOCK SIZE BLOCK # ...

Page 58

PACKAGE DIMENSIONS TC58FVM6(T/B)2A(FT/XB)65 Unit: mm 2002-10-24 58/61 ...

Page 59

PACKAGE DIMENSIONS TC58FVM6(T/B)2A(FT/XB)65 Unit: mm 2002-10-24 59/61 ...

Page 60

Revision History Date Rev. 2002-03-14 1.00 Original version P.6 Corrected bank addresses. P.15 Corrected CFI CODE (31H). 2002-06-21 1.01 P.23 Changed t P.25 Added timing diagram of read after command input. P.17 Added explanation of DATA polling in case of ...

Page 61

... TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property ...

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