AT17C020A-10JI Atmel, AT17C020A-10JI Datasheet

IC SERIAL CONFIG PROM 2M 20PLCC

AT17C020A-10JI

Manufacturer Part Number
AT17C020A-10JI
Description
IC SERIAL CONFIG PROM 2M 20PLCC
Manufacturer
Atmel
Datasheet

Specifications of AT17C020A-10JI

Programmable Type
Serial EEPROM
Memory Size
2Mb
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT17C020A10JI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT17C020A-10JI
Manufacturer:
Atmel
Quantity:
10 000
Features
Description
The AT17C020A and AT17LV020A (high-density AT17A Series) FPGA Configuration
EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration mem-
ory for programming Altera FLEX
popular 20-lead PLCC. The AT17A Series family uses a simple serial-access proce-
dure to configure one or more FPGA devices. The AT17A Series organization
supplies enough memory to configure one or multiple smaller FPGAs. Using a feature
of the AT17A Series, the user can select the polarity of the reset function by program-
ming internal EEPROM bytes. The AT17A parts generate their own internal clock and
can be used as a system “master” for loading the FPGA devices.
The Atmel devices also support a system-friendly READY pin. The READY pin is used
to simplify system power-up considerations.
The AT17A Series Configurators can be programmed with industry-standard program-
mers, or Atmel’s ATDH2200E Programming Kit.
Pin Configurations
Serial EEPROM Family for Configuring Altera FLEX
Simple Interface to SRAM FPGAs
EE Programmable 2M-bit Serial Memories Designed to Store Configuration Programs
for Field Programmable Gate Arrays (FPGAs)
Cascadable Read Back to Support Additional Configurations or Future
Higher-density Arrays
Low-power CMOS EEPROM Process
Programmable Reset Polarity
Available in the Space-efficient Surface-mount PLCC Package
In-System Programmable Via 2-wire Bus
Emulation of Atmel’s AT24CXXX Serial EEPROMs
Available in 3.3V ± 5% LV and 5V ± 5% C Versions
System-friendly READY Pin
DCLK
NC
NC
NC
OE
4
5
6
7
8
PLCC
18
17
16
15
14
SER_EN
NC
NC
READY
NC
®
devices. The AT17A Series is packaged in the
®
Devices
FPGA
Configuration
EEPROM
Memory
2-Mbit
Altera Pinout
AT17C020A
AT17LV020A
Rev. 1270A–05/00
1

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AT17C020A-10JI Summary of contents

Page 1

... Available in 3.3V ± and 5V ± Versions • System-friendly READY Pin Description The AT17C020A and AT17LV020A (high-density AT17A Series) FPGA Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration mem- ory for programming Altera FLEX popular 20-lead PLCC. The AT17A Series family uses a simple serial-access proce- dure to configure one or more FPGA devices ...

Page 2

Block Diagram SER_EN OSC CONTROL OSC POWER ON RESET DCLK READY Device Configuration The control signals for the configuration EEPROM-nCS, OE, and DCLK-interface directly with the FPGA device control signals. All FPGA devices can control the entire configuration process and ...

Page 3

FPGA Device Configuration FPGA devices can be configured with an AT17A Series EEPROM as shown in Figure 1. The AT17A Series device stores configuration data in its EEPROM array and clocks the data out serially with its internal oscillator. The ...

Page 4

... DATA DATA0 nCS OE inside the chip. See the “Programming Specification for Atmel’s Configuration EEPROMs” application note for fur- ther information. The AT17 A-series parts are read/write at 5V nominal. The AT17LV A-series parts are read/write at 3.3V nominal. Standby Mode The AT17A Series Configurator enters a low-power standby mode whenever nCS is asserted High ...

Page 5

Pin Configurations 20 PLCC Pin Name I/O Description 2 DATA I/O Three-state data output for configuration. Open-collector bi-directional pin for programming. 4 DCLK I/O Clock output or clock input. Rising edges on DCLK increment the internal address counter and present ...

Page 6

... Operating Conditions Symbol Description Supply voltage relative to GND Commercial -0°C to +70°C Supply voltage relative to GND V Industrial CC -40°C to +85°C Supply voltage relative to GND Military -55°C to +125°C AT17C/LV020A 6 AT17C020A AT17LV020A Min/Max Min/Max 4.75/5.25 3.15/3.45 4.5/5.5 3.15/3.45 4.5/5.5 3.15/3.45 Units ...

Page 7

... Low-level output voltage ( High-level output voltage ( Low-level output voltage ( Supply current, active mode (at FMAX) CCA I Input or output leakage current ( Supply current, standby mode AT17C020A CCS DC Characteristics V = 3.3V ± Symbol Description V High-level input voltage IH V Low-level input voltage IL V High-level output voltage (I ...

Page 8

AC Characteristics nCS OE DCLK DATA AC Characteristics When Cascading OE nCS DCLK DATA nCASL AT17C/LV020A 8 T SCE CAC CDF LAST BIT T T OCK OCE T SCE T ...

Page 9

... T OE Low Time (guarantees counter is reset) LOE F MAX Input Clock Frequency Slave Mode MAX T DCLK Low Time Master Mode LC T DCLK High Time Master Mode HC AC Characteristics for AT17C020A When Cascading ± 5% Commercial / Symbol Description (3) T DCLK to Data Float Delay CDF (2) ...

Page 10

AC Characteristics for AT17LV020A V = 3.3V ± 5% Commercial / Symbol Description ( Data Delay OE (2) T nCS to Data Delay CE (2) T DCLK to Data Delay CAC T Data ...

Page 11

... Ordering Information - 5V Devices Memory Size Ordering Code (1) 2M AT17C020A-10JC AT17C020A-10JI Ordering Information - 3.3V Devices Memory Size Ordering Code (1) 2M AT17LV020A-10JC AT17LV020A-10JI Note: 1. Use 2M density parts to replace Altera EPC2. 20J 20-lead, Plastic J-leaded Chip Carrier (PLCC) Package 20J 20J Package 20J 20J ...

Page 12

Packaging Information 20J, 20-lead, Plastic J-leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-018 AA AT17C/LV020A 12 ...

Page 13

... No licenses to patents or other intellectual prop- erty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life suppor t devices or systems. ...

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