L6566B STMicroelectronics, L6566B Datasheet - Page 28

IC CTRLR OVP OTP UVLO HV 16SOIC

L6566B

Manufacturer Part Number
L6566B
Description
IC CTRLR OVP OTP UVLO HV 16SOIC
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6566B

Output Isolation
Isolated
Frequency Range
10 ~ 300kHz
Voltage - Input
8 ~ 23 V
Power (watts)
750mW
Operating Temperature
-40°C ~ 150°C
Package / Case
16-SOIC (0.154", 3.90mm Width)
Output Current
800 mA
Output Power
750 mW
Input Voltage
8 V to 23 V
Operating Temperature Range
- 40 C to + 150 C
Mounting Style
SMD/SMT
Duty Cycle (max)
75 %
Selectable Multi-mode Operation
fixed frequency or quasi-resonant
For Use With
497-6452 - BOARD EVAL FOR L6566B497-6451 - BOARD EVAL FOR L6566B497-6450 - BOARD EVAL FOR L6566B497-6449 - BOARD EVAL FOR L6566A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Application information
Note:
28/51
setpoint. This is illustrated in the diagram on the left-hand side of
shows the relationship between the voltage on the pin VFF and V
saturated high in the attempt of keeping output voltage regulation):
Equation 5
Figure 16. Typical power capability change vs input voltage in QR flyback
If the voltage on the pin exceeds 3 V switching ceases but the soft-start capacitor is not
discharged. The schematic in
in the control loop.
With a proper selection of the external divider R1-R2, i.e. of the ratio k = R2 / (R1+R2), it is
possible to achieve the optimum compensation described by the lower curve in the diagram
of
The optimum value of k, k
voltage range, is the one that provides equal power capability at the extremes of the range.
The exact calculation is complex, and non-idealities shift the real-world optimum value from
the theoretical one. It is therefore more practical to provide a first cut value, simple to be
calculated, and then to fine tune experimentally.
Assuming that the system operates exactly at the boundary between DCM and CCM, and
neglecting propagation delays, the following expression for k
Equation 6
Figure 16
.
converters
2.5
1.5
0.5
2
1
k
1
opt
opt
=
, which minimizes the power capability variation over the input
Figure 17 on page 29
3
1.5
V
V
csx
in
min
=
1
V
2
in
max
V
VFF
3
V
+
inmin
V
2.5
(
in
=
V
V
compensated
system optimally
R
in
system not
compensated
1
min
shows also how the function is included
k
3
+
Vin
V
3
in
max
opt
)
can be found:
3.5
csx
V
Figure 17 on page 29
R
k = k
(with the error amplifier
k = 0
k
opt
4
L6566B
: it

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