ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 44

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7878
Bits[8:6] (REVAPC, REVAPB, and REVAPA, respectively) in the
STATUS0[31:0] register are set when a sign change occurs in the
power selected by Bit 6 (REVAPSEL) in the ACCMODE[7:0]
register.
Bits[2:0] (CWSIGN, BWSIGN, and AWSIGN, respectively) in
the PHSIGN[15:0] register are set simultaneously with the
REVAPC, REVAPB, and REVAPA bits. They indicate the sign of
the power. When they are 0, the corresponding power is positive.
When they are 1, the corresponding power is negative.
Bit REVAPx of the STATUS0[31:0] register and Bit xWSIGN in the
PHSIGN[15:0] register refer to the total active power of Phase x,
the power type being selected by Bit 6 (REVAPSEL) in the
ACCMODE[7:0] register.
Interrupts attached to Bits[8:6] (REVAPC, REVAPB, and
REVAPA, respectively) in the STATUS0[31:0] register can be
enabled by setting Bits[8:6] in the MASK0[31:0] register. If
enabled, the IRQ0 pin is set low and the status bit is set to 1
whenever a change of sign occurs. To find the phase that
triggered the interrupt, the PHSIGN[15:0] register is read
immediately after reading the STATUS0[31:0] register. Next, the
status bit is cleared and the IRQ0 pin is returned to high by writing
to the STATUS0 register with the corresponding bit set to 1.
Active Energy Calculation
As previously stated, power is defined as the rate of energy flow.
This relationship can be expressed mathematically as
VA
IA
APHCAL
AVGAIN
AIGAIN
HPFDIS
HPFDIS
[23:0]
[23:0]
HPF
HPF
INTEGRATOR
DIGITAL
Figure 61. Total Active Energy Accumulation
DIGITAL SIGNAL PROCESSOR
LPF2
AWATTOS
Rev. 0 | Page 44 of 92
AWGAIN
Conversely, energy is given as the integral of power, as follows:
Total and fundamental active energy accumulations are always
signed operations. Negative energy is subtracted from the active
energy contents.
The ADE7878 achieves the integration of the active power
signal in two stages (see Figure 61). The process is identical for
both total and fundamental active powers. The first stage is
accomplished inside the DSP: every 125 μs (8 kHz frequency),
the instantaneous phase total or fundamental active power is
accumulated into an internal register. When a threshold is
reached, a pulse is generated at the processor port and the
threshold is subtracted from the internal register. The sign of
the energy in this moment is considered the sign of the active
power (see Sign of Active Power Calculation section for details).
The second stage is done outside the DSP and consists of
accumulating the pulses generated by the processor into internal
32-bit accumulation registers. The content of these registers is
transferred to the watt-hour registers, xWATTHR[31:0] and
xFWATTHR[31:0], when these registers are accessed.
Power =
Energy
ACCUMULATOR
=
dEnergy
WTHR[47:0]
∫
p
dt
( )
t
dt
AWATTHR[31:0]
REVAPA BIT IN
STATUS0[31:0]
REGISTER
32-BIT
(23)
(24)