ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 64

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ADE7878ACPZ

Manufacturer Part Number
ADE7878ACPZ
Description
IC ENERGY METERING 3PH 40LFCSP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of ADE7878ACPZ

Input Impedance
400 KOhm
Measurement Error
0.1%
Voltage - I/o High
2.4V
Voltage - I/o Low
0.4V
Current - Supply
22mA
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-WFQFN, CSP Exposed Pad
Meter Type
3 Phase
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LFCSP
No. Of Pins
40
Msl
MSL 1 - Unlimited
Peak Reflow Compatible (260 C)
Yes
Supply Voltage Min
3V
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ADE7878
the address of the ADE7878 followed by the 16-bit address of
the target register. The ADE7878 acknowledges every byte
received. The address byte is similar to the address byte of a
write operation and is equal to 0x70 (see the I
Operation section for details). After the last byte of the register
address has been sent and it has been acknowledged by the
ADE7878, the second stage begins with the master generating a
new start condition followed by an address byte. The most
significant seven bits of this address byte constitute the address
of the ADE7878, and they are equal to 0111000b. Bit 0 of the
S
S
0
0
SLAVE ADDRESS
1 1 1 0 0 0 0
S
SLAVE ADDRESS
1 1 1 0 0 0 0
0
1 1 1 0 0 0 1
SLAVE ADDRESS
A
C
K
15
REGISTER ADDRESS
ACK GENERATED BY
A
C
K
MS 8 BITS OF
15
REGISTER ADDRESS
ADE7878
MSB 8 BITS OF
A
C
K
31
8
ACK GENERATED BY
A
C
K
BYTE 3 (MSB)
OF REGISTER
7
REGISTER ADDRESS
2
ADE7878
C Write
LS 8 BITS OF
8
Figure 80. I
Figure 81. I
A
C
K
7
REGISTER ADDRESS
LSB 8 BITS OF
16
0
A
C
K
2
2
C Write Operation of a 32-Bit Register
C
K
C Read Operation of a 32-Bit Register
A
15
31
Rev. 0 | Page 64 of 92
OF REGISTER
BYTE 3 (MS)
BYTE 2 OF
REGISTER
0
ACK GENERATED BY
A
C
K
ACK GENERATED BY
ADE7878
16
address byte is a read/write bit. Because this is a read operation,
it must be set to 1; thus, the first byte of the read operation is
0x71. After this byte is received, the ADE7878 generates an
acknowledge. Then, the ADE7878 sends the value of the
register, and after every eight bits are received, the master
generates an acknowledge. All the bytes are sent with the most
significant bit first. Because registers can have 8, 16, or 32 bits,
after the last bit of the register is received, the master does not
acknowledge the transfer but generates a stop condition.
A
C
K
MASTER
15
BYTE 2 OF REGISTER
8
A
C
K
7
BYTE 1 OF
REGISTER
8
A
C
K
BYTE 1 OF REGISTER
7
0
A
C
K
7
0
OF REGISTER
A
C
K
BYTE 0 (LSB)
7
BYTE 0 (LS) OF
REGISTER
0
0
N
O
A
C
K
C
K
A
S
S

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