MCZ33927EKR2 Freescale Semiconductor, MCZ33927EKR2 Datasheet - Page 4
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MCZ33927EKR2
Manufacturer Part Number
MCZ33927EKR2
Description
IC FET PRE-DRIVER 3PH 54-SOIC
Manufacturer
Freescale Semiconductor
Specifications of MCZ33927EKR2
Configuration
3 Phase Bridge
Input Type
Inverting and Non-Inverting
Delay Time
265ns
Current - Peak
600mA
Number Of Configurations
1
Number Of Outputs
3
High Side Voltage - Max (bootstrap)
75V
Voltage - Supply
8 V ~ 40 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
54-SOIC (7.5mm Width) Exposed Pad, 54-eSOIC, 54-HSOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 1. 33927 Pin Definitions (continued)
4
33927
PIN CONNECTIONS
A functional description of each pin can be found in the
30, 31
Pin
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
32
34
35
36
37
38
39
40
41
42
43
44
45
AMP_OUT
PC_BOOT
PC_HS_G
PB_HS_G
PB_BOOT
Pin Name
VLS_CAP
PC_LS_G
PC_HS_S
PB_LS_G
PB_HS_S
PA_LS_G
OC_OUT
PGNDC
PGNDB
PGNDA
AMP_N
AMP_P
OC_TH
PA_HS
PB_HS
PC_HS
PA_LS
PB_LS
PC_LS
SCLK
VDD
GND
VSS
INT
CS
SO
SI
Analog Output
Analog Output
Analog Output VLS Regulator Output
Pin Function
Digital Output
Digital Output
Digital Output
Power Output Phase C Low-Side Gate
Power Output
Power Output Phase B Low-Side Gate
Power Output
Power Output Phase A Low-Side Gate
Analog Input
Analog Input
Analog Input Overcurrent Threshold Threshold of the overcurrent detector
Analog Input
Analog Input
Digital Input
Digital Input
Digital Input
Digital Input
Digital Input
Digital Input
Digital Input
Digital Input
Digital Input
Power Input
Power Input
Power Input
Power Input
Power Input
Ground
Ground
Voltage Source Supply Ground reference for logic interface and power supplies
Amplifier Non-Invert
Phase A High-Side
Phase B High-Side
Phase C High-Side
Phase C High-Side
Phase C High-Side
Phase B High-Side
Phase C Low-Side
Phase C Bootstrap
Phase B High-side
Phase B Bootstrap
Phase A Low-Side
Phase B Low-Side
Amplifier Output
Overcurrent Out
Phase C Return
Phase B Return
Phase A Return
VDD Regulator
Amplifier Invert
Formal Name
Serial Clock
Chip Select
Gate Drive
Gate Drive
Serial Out
Capacitor
Interrupt
Serial In
Ground
Source
Source
Drive
Drive
Drive
Functional Pin Description
Active low input logic signal enables the High-Side Driver for Phase A
Active high input logic signal enables the Low-Side Driver for Phase A
VDD regulator output. Internally generated 5V supply
Active low input logic signal enables the High-Side Driver for Phase B
Active high input logic signal enables the Low-Side Driver for Phase B
Interrupt pin output
Chip Select input. It frames SPI commands and enables SPI port
Input data for SPI port. Clocked on the falling edge of SCLK, MSB first
Clock for SPI port and typically is 3.0 MHz
Output data for SPI port. Tri-state until CS becomes low
Active high input logic signal enables the Low-Side Driver for Phase C
Active low input logic signal enables the High-Side Driver for Phase C
Output of the current-sensing amplifier
Inverting input of the current-sensing amplifier
Non-inverting input of the current-sensing amplifier
Totem pole digital output of the Over-current Comparator
Substrate and ESD reference, connect to VSS
VLS Regulator connection for additional output capacitor, providing low
impedance supply source for Low-Side Gate Drive
Gate current return for the Low-Side FETs for Phase C gate current
Gate drive output for Phase C Low-Side
Source connection for Phase C High-Side FET
Gate Drive for output Phase C High-Side FET
Bootstrap capacitor for Phase C
Gate current return for the Low-Side FETs for Phase B
Gate Drive for output Phase B Low-Side
Source connection for Phase B High-Side FET
Gate Drive for output Phase B High-Side
Bootstrap capacitor for Phase B
Gate current return for the Low-Side FETs for Phase A
Gate Drive for output Phase A Low-Side
section beginning on
Analog Integrated Circuit Device Data
Definition
Freescale Semiconductor
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20.