FAN5009MPX Fairchild Semiconductor, FAN5009MPX Datasheet - Page 5

• Manufacturer Part Number: FAN5009MPX
• Description: IC DRIVER MOSFET DUAL 12V 8MLP
• Manufacturer: Fairchild Semiconductor
• Type: High Side/Low Sider

Specifications of FAN5009MPX

• Configuration: High and Low Side, Synchronous
• Input Type: Inverting and Non-Inverting
• Delay Time: 50ns
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 15V
• Voltage - Supply: 6.4 V ~ 13.5 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MLP
• Supply Voltage (min): 10 V
• Supply Current: 8 mA
• Maximum Power Dissipation: 715 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Number Of Drivers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Peak: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PRODUCT SPECIFICATION
Electrical Specifications
NOTES:
1. All limits at operating temperature extremes are guaranteed by design, characterization and statistical quality control
2. AC Specifications guaranteed by design/characterization (not production tested).
3. For propagation delays, “tpdh” refers to low-to-high signal transition and “tpdl” refers to high-to-low signal transition
4. Transition times are defined for 10% and 90% of DC values
REV. 1.0.5 7/22/04
Parameter
Low-Side Driver
Output Resistance, Sourcing
Current
Output Resistance, Sinking
Current
Transition Times
Propagation Delay
2,4
PWM
LDRV
HDRV-SW
SW
2,3
OD
LDRV / HDRV
V
IH(PWM)
t
pdh(HDRV)
V
IL(OD)
1.2V
R
R
t
t
t
t
t
(continued)
R(LDRV)
F(LDRV)
pdh(LDRV)
pdl(LDRV)
pdh(ODRV)
Symbol
t
LUP
LDN
pdl (LDRV)
Figure 4. Adaptive Gate Drive Timing
Figure 3. Output Disable Timing
t
pdl(OD)
See Figure 2
See Figures 2, 4
See Adaptive Gate
Drive Circuit
description
Conditions
t
pdl (HDRV)
V
IL(PWM)
V
IH(OD)
t
pdh(LDRV)
2.2V
Min.
t
pdh(OD)
Typ.
240
3.4
1.4
40
20
20
25
Max.
4.0
1.8
50
30
30
40
FAN5009
Units
ns
ns
ns
ns
ns
Ω
Ω
5