MCZ33927EK Freescale Semiconductor, MCZ33927EK Datasheet - Page 6

• Manufacturer Part Number: MCZ33927EK
• Description: IC FET PRE-DRIVER 3PH 54-SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33927EK

• Configuration: 3 Phase Bridge
• Input Type: Inverting and Non-Inverting
• Delay Time: 265ns
• Current - Peak: 600mA
• Number Of Configurations: 1
• Number Of Outputs: 3
• High Side Voltage - Max (bootstrap): 75V
• Voltage - Supply: 8 V ~ 40 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 54-SOIC (7.5mm Width) Exposed Pad, 54-eSOIC, 54-HSOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2. Maximum Ratings
permanent damage to the device.
6
33927
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL RATINGS
Notes
VBAT Supply Voltage
VPWR Supply Voltage
Charge Pump (PUMP, VPUMP)
VLS Regulator Outputs (VLS
Logic Supply Voltage
Logic Output (INT, SO, PHASEA, PHASEB, PHASEC, OC_OUT)
Logic Input Pin Voltage (EN1, EN2, Px_HS, Px_LS, SI, SCLK, CS, RST) 10mA
Amplifier Input Voltage
Over-current comparator threshold 10mA
Driver Output Voltage
Driver Voltage Transient Survival
Continuous Output Current
ESD Voltage
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
1.
2.
3.
4.
Normal Operation (Steady-State)
Transient Survival
Normal Operation (Steady-State)
Transient Survival
(Both Inputs-GND), (AMP_P - GND) or (AMP_N - GND) 6mA source or sink
High-Side bootstrap (PA_BOOT, PB_BOOT, PC_BOOT)
High-Side (PA_HS_G, PB_HS_G, PC_HS_G)
Low-Side (PA_LS_G, PB_LS_G, PC_LS_G)
High-Side (PA_HS_G, PB_HS_G, PC_HS_G, PA_HS_S, PB_HS_S,
PC_HS_S)
Low-Side (PA_LS_G, PB_LS_G, PC_LS_G, PGNDA, PGNDB, PGNDC)
Human Body Model - HBM (All pins except for the pins listed below)
Pins: PA_Boot, PA_HS_S, PA_HS_G, PB_Boot, PB_HS_S,
PB_HS_G, PC_Boot, PC_HS_S, PC_HS_G, VPWR
Charge Device Model - CDM
The device will withstand load dump transient as defined by ISO7637 with peak voltage of 80V.
Short-circuit proof, the device will not be damaged or induce unexpected behavior due to shorts to external sources within this range.
This voltage should not be applied without also taking voltage at HS_S and voltage at PGND_x into account.
ESD testing is performed in accordance with the Human Body Model (HBM) (C
Model (CDM), Robotic (C
(4)
(1)
(1)
(3)
,
VLS_CAP)
ZAP
Ratings
= 4.0pF).
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
(2)
Symbol
ZAP
V
V
V
V
V
V
V
V
V
V
I
V
V
V
V
V
GATE
PUMP
V
PGND
BOOT
HS_G
HS_G
V
LS_G
HS_S
LS_G
PWR
OUT
IN_A
BAT
ESD
DD
OC
LS
IN
= 100pF, R
Analog Integrated Circuit Device Data
ZAP
= 1500Ω) and the Charge Device
-7.0 to 10.0
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 7.0
-0.1 to 0.1
-1.5 to 80
-1.5 to 80
-0.3 to 40
-0.3 to 18
±2000
±1000
Value
±750
-7.0
-7.0
-7.0
-7.0
58
58
75
75
16
Freescale Semiconductor
Unit
V
V
V
V
V
V
V
V
V
V
V
A
V