TLE6214L Infineon Technologies, TLE6214L Datasheet - Page 8

• Manufacturer Part Number: TLE6214L
• Description: IC SWITCH DUAL CURR SENSE PDSO12
• Manufacturer: Infineon Technologies
• Type: Low Sider

Specifications of TLE6214L

• Input Type: SPI
• Number Of Outputs: 2
• On-state Resistance: 180 mOhm
• Current - Output / Channel: 6.5A
• Current - Peak Output: 12A
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-12
• Packages: PG-DSO-12
• Thermal Class: Heatslug down
• Id Nom: 2 x 2 A
• Pin Count: 12.0 Pins
• Channels: 2.0
• Comment: please use RoHS compliant TLE8102SG
• For Use With: DEMOBOARDTLE6214LIN - BOARD DEMO FOR TLE 6214L
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: SP000014123; TLE6214LNT; TLE6214LT; TLE6214LT

SPI
The SPI is a Serial Peripheral Interface with 4 digital pins
and an 8 bit shift register. The SPI is used to configure and
program the device, turn on and off channels and to read
detailed diagnostic information.
Note: The default setting of the TLE614L is to use the the
SO/ST2 pin as status output pin for channel 2. To activate
the SO function of the SPI the command "I/O Configure" (see. SPI commands: No.3) has to be used
to reconfigure the IC. (e.g. 0111 xxxx)
SPI Signal Description:
CS - Chip Select. The system microcontroller selects the TLE 6214 L by means of the CS pin. When-
ever the pin is in a logic low state, data can be transferred from the µC and vice versa.
CS = L : SPI is working like a shift register. With each clock signal at the SCLK pin the state of the SI is
read into the SPI shift-register (falling clock edge) and one diagnosis bit is written out of SO (rising ris-
ing edge).
CS = L!H:
To avoid any false clocking the serial clock input pin SCLK should be logic low state during high to low
transition of CS.
SCLK - Serial Clock. The serial clock pin clocks the internal SPI shift register of the TLE 6214 L. The
serial input (SI) accepts data into the input SPI shift register on the falling edge if while the serial output
(SO) shifts diagnostic information out of the SPI shift register on the rising edge of serial clock. It is es-
sential that the SCLK pin is in a logic low state whenever chip select CS makes any transition.
SI - Serial Input. Serial data bits are shifted in at this pin, the most significant bit (MSB) first. SI infor-
mation is read in on the falling edge . Input data is latched in the SPI shift register and then transferred
to the internal registers of the logic.
The input data consist of 8 bit, made up of x control bits and y data bits. The control word is used to
program the device, to operate it in a certain mode as well as providing diagnostic information (see SPI
Commands).
SO - Serial Output. Diagnostic data bits are shifted out serially at this pin, the most significant bit (MSB)
first. SO is in a high impedance state until the CS pin goes to a logic low state. New diagnostic data will
appear at the SO pin following the rising edge.
V3.0
Serial input
data MSB first
SI
to logic high or low state corresponding to the SO bits
transfer of SI bits from SPI shift register into the internal logic registers
reset of diagnosis register if command was valid
LSB
LSB
internal logic registers
8 bit SPI shift register
CS
diagnosis register
CS
MSB
MSB
Page
Serial output
(diagnosis)
MSB first
8
SO
CS = H : Any signals at the SCLK and SI
pins are ignored and SO is forced into a
high impedance state.
CS = H!L :
diagnostic information is transferred
from the diagnosis register into the SPI
shift register. (in sleep mode no tranfer
of diagnostic information)
serial input data can be clocked into the
SPI shift register from then on
SO changes from high impedance state
SCLK
SO
CS
SI
Datasheet TLE 6214 L
SPI
18.10.2004