IR3523MTRPBF International Rectifier, IR3523MTRPBF Datasheet - Page 11

IC XPHASE3 CTLR VR11.1 40-MLPQ

IR3523MTRPBF

Manufacturer Part Number
IR3523MTRPBF
Description
IC XPHASE3 CTLR VR11.1 40-MLPQ
Manufacturer
International Rectifier
Series
XPhase3™r
Datasheet

Specifications of IR3523MTRPBF

Applications
Processor
Current - Supply
10mA
Voltage - Supply
4.75 V ~ 7.5 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
40-MLPQ
Ic Function
Dual Output Control IC
Supply Voltage Range
4.75V To 7.5V
Operating Temperature Range
0°C To +150°C
Digital Ic Case Style
MLPQ
No. Of Pins
40
Controller Type
XPhase
Rohs Compliant
Yes
Package
40-Lead MLPQ
Circuit
X-Phase Control IC
Switch Freq (khz)
250kHz to 1.5MHz
Pbf
PbF Option Available
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SYSTEM THEORY OF OPERATION
PWM Control Method
The PWM block diagram of the xPHASE3
with trailing edge modulation is used. A high-gain wide-bandwidth voltage type error amplifier in the Control IC is
used for the voltage control loop. Input voltage is sensed in phase ICs and feed-forward control is realized. The
PWM ramp slope will change with the input voltage automatically compensating for changes in the input voltage.
The input voltage can change due to variations in the silver box output voltage or due to the wire and PCB-trace
voltage drop related to changes in load current.
Frequency and Phase Timing Control
The oscillator is located in the Control IC and the system clock frequency is programmable from 500kHz to 9MHZ
by an external resistor. The control IC system clock signal (CLKOUT) is connected to CLKIN of all the phase ICs.
The phase timing of the phase ICs is controlled by the daisy chain loop, where control IC phase clock output
(PHSOUT) is connected to the phase clock input (PHSIN) of the first phase IC, and PHSOUT of the first phase IC is
connected to PHSIN of the second phase IC, etc. and PHSOUT of the last phase IC is connected back to PHSIN of
the control IC. During power up, the control IC sends out clock signals from both CLKOUT and PHSOUT pins and
detects the feedback at PHSIN pin to determine the phase number and monitor any fault in the daisy chain loop.
Figure 6 shows the phase timing for a four phase converter.
IR3523 CONTROL IC
ERROR
AMPLIFIER
Output 1 Only
IFB1
CLOCK GENERATOR
Page 11 of 37
REMOTE SENSE
AMPLIFIER
VDRP1 AMP
+
IROSC
VDAC
+
-
+
-
+
-
-
VDRP1
IIN1
CLKOUT
PHSOUT
PHSIN
VOUT1
VDAC1
LGND
EAOUT1
FB1
RCP1
CCP11
CCP12
RFB12
CFB1
CDRP1
GATE DRIVE
VOLTAGE
RFB11
RDRP1
Figure 5 - PWM Block Diagram
TM
architecture is shown in Figure 5. Feed-forward voltage mode control
PHSOUT
PHSOUT
ISHARE
DACIN
ISHARE
DACIN
CLKIN
PHSIN
CLKIN
PHSIN
EAIN
EAIN
3K
3K
CLK
D
CLK
D
SHARE ADJUST
ERROR AMPLIFIER
SHARE ADJUST
ERROR AMPLIFIER
Q
Q
+
-
+
-
RAMP
DISCHARGE
CLAMP
RAMP
DISCHARGE
CLAMP
ENABLE
ENABLE
PWM
COMPARATOR
-
PWM
COMPARATOR
-
VID6
VID6
+
+
VID6
VID6
VID6
VID6
-
+
-
+
+
-
+
-
PHASE IC
PHASE IC
BODY
BRAKING
COMPARATOR
BODY
BRAKING
COMPARATOR
PWM
LATCH
DOMINANT
PWM
LATCH
DOMINANT
S
RESET
R
S
RESET
R
VID6
VID6
VID6
VID6
+
+
+
+
+
+
-
-
CURRENT
SENSE
AMPLIFIER
CURRENT
SENSE
AMPLIFIER
+
-
+
-
CSIN-
CSIN-
VCC
VCCH
GATEH
SW
VCCL
GATEL
PGND
CSIN+
VCC
VCCH
GATEH
SW
VCCL
GATEL
PGND
CSIN+
CCS RCS
CCS
June 20, 2008
RCS
CBST
CBST
IR3523
COUT
VIN
VOSNS1+
VOUT1
GND
VOSNS1-

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