ADT7518ARQ-REEL Analog Devices Inc, ADT7518ARQ-REEL Datasheet - Page 21

IC SENSOR TEMP W/ADC/DAC 16QSOP

ADT7518ARQ-REEL

Manufacturer Part Number
ADT7518ARQ-REEL
Description
IC SENSOR TEMP W/ADC/DAC 16QSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADT7518ARQ-REEL

Rohs Status
RoHS non-compliant
Function
Temp Monitoring System (Sensor)
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 120°C, External Sensor
Output Type
I²C™, MICROWIRE™, QSPI™, SPI™
Output Alarm
No
Output Fan
No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 120°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
The ADC resolution is 10 bits and is mostly suitable for dc input
signals. Bits C1:2 of the Control Configuration 1 register
(Address 18h) are used to set up Pins 7 and 8 as AIN1 and
AIN2. Figure 44 shows the overall view of the 4-channel analog
input path.
Converter Operation
The analog input channels use a successive approximation ADC
based on a capacitor DAC. Figure 45 and Figure 46 show
simplified schematics of the ADC. Figure 45 shows the ADC
during acquisition phase. SW2 is closed and SW1 is in position
A. The comparator is held in a balanced condition and the
sampling capacitor acquires the signal on AIN.
When the ADC eventually goes into conversion phase (see
Figure 46), SW2 opens and SW1 moves to position B, causing
the comparator to become unbalanced. The control logic and
the DAC are used to add and subtract fixed amounts of charge
from the sampling capacitor to bring the comparator back into
a balanced condition. When the comparator is rebalanced, the
conversion is complete. The control logic generates the ADC
output code. Figure 47 shows the ADC transfer function for the
analog inputs.
AIN
AIN
REF/2
AIN1
AIN2
AIN3
AIN4
REF/2
SW1
SW1
A
A
Figure 44. Quad Analog Input Path
CAPACITOR
B
CAPACITOR
B
SAMPLING
Figure 45. ADC Acquisition Phase
Figure 46. ADC Conversion Phase
SAMPLING
SW2
M
U
L
T
P
L
E
X
E
R
SW2
I
COMPARATOR
COMPARATOR
ACQUISITION
CONVERSION
10-BIT
INT V
ADC
INT V
PHASE
PHASE
REF
REF
CAP DAC
CONTROL
CAP DAC
CONTROL
TO ADC
VALUE
REGISTER
LOGIC
LOGIC
REF
REF
V
V
DD
DD
Rev. A | Page 21 of 40
ADC TRANSFER FUNCTION
The output coding of the ADT7518 analog inputs is straight
binary. The designed code transitions occur midway between
successive integer LSB values (i.e., 1/2 LSB, 3/2 LSB). The LSB is
V
transfer characteristic is shown in Figure 47.
To work out the voltage on any analog input channel, the
following method can be used:
Convert the value read back from the AIN value register into a
decimal format.
d = decimal
Example:
Internal reference used. Therefore V
Analog Input ESD Protection
Figure 48 shows the input structure on any of the analog input
pins that provides ESD protection. The diode provides the main
ESD protection for the analog inputs. Care must be taken that
the analog input signal never drops below the GND rail by
more than 200 mV. If this happens, the diode will become
forward-biased and start conducting current into the substrate.
The 4 pF capacitor is the typical pin capacitance and the resistor
is a lumped component made up of the on-resistance of the
multiplexer switch.
DD
1 LSB = reference (v)/1024
AIN value = 512d
1
AIN
AIN
/1024 or internal V
LSB
voltage
voltage
size
111...111
111...110
111...000
011...111
000...010
000...001
000...000
=
Figure 48. Equivalent Analog Input ESD Circuit
. 2
Figure 47. Single-Ended Transfer Function
=
=
25
512
AIN
AIN
0V 1/2LSB
V
×
/
4pF
value
1024
. 2
REF
197
/1024, internal V
( )
=
d
×
. 2
10
ANALOG INPUT
×
197
1LSB = INT V
1LSB = V
LSB
3
+V
×
=
REF
REF
10
. 1
100Ω
size
125
DD
= 2.25 V.
– 1LSB
3
/1024
REF
V
REF
/1024
= 2.25 V. The ideal
ADT7518

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