ADM1033ARQZ-REEL7 ON Semiconductor, ADM1033ARQZ-REEL7 Datasheet - Page 11

• Manufacturer Part Number: ADM1033ARQZ-REEL7
• Description: IC THERM/FAN SPEED CTRLR 16-QSOP
• Manufacturer: ON Semiconductor

Specifications of ADM1033ARQZ-REEL7

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Addresses for Single/Block Byte Modes
and write operations. The register address determines
whether a single byte or multiple byte (block) operation is
run. For a single byte operation, the MSB of the register
address is set to 0; for a multiple byte operation, it is set to 1.
The number of bytes read in a multiple byte operation is set
in the #Bytes/Block Read Register at Address 0x00. The
number of bytes written to the ADM1033 is specified during
the block write operation. The addresses quoted in the
register map and throughout this data sheet assume single
byte operation. For multiple byte operations, set the MSB of
each register address to 1.
Write Operations
write operations. The ADM1033 supports send byte, write
byte, and block byte SMBus write protocols. The following
abbreviations are used in the diagrams:
S—START
P—STOP
R—READ
W—WRITE
A—ACKNOWLEDGE
A—NO ACKNOWLEDGE
Send Byte
single−command byte to a slave device as follows:
The ADM1033 supports single byte as well as block read
The SMBus specifications define protocols for read and
In
1. The master device asserts a start condition on
2. The master sends a 7−bit address followed by the
3. The addressed slave device asserts ACK on SDA.
4. The master sends the register address.
5. The slave asserts ACK on SDA.
this
SDA.
write bit (low).
SDA
SCL
SDA
SCL
operation,
START BY
START BY
MASTER
MASTER
A6
1
A6
1
Figure 18. Writing to the Address Pointer Register Only (Send Byte)
the
A5
A5
Figure 19. Reading Data from a Previously Selected Register
master
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
A4
A4
A3
A3
FRAME 1
FRAME 1
9
device
A2
A2
A1
A1
sends
http://onsemi.com
A0
A0
a
R/W
R/W
11
ADM1033
ADM1033
ACK. BY
ACK. BY
register address to the APR for a subsequent read from the
same address. (See Figure 24.) The user may be required to
read data from the register immediately after setting up the
address. If so, the master can assert a repeat start condition
immediately after the final ACK and carry out a single byte
read without asserting an intermediate stop condition.
Write Byte
address and one data byte to the slave device as follows:
9
The ADM1033 uses the send byte operation to write a
In this operation, the master device sends a register
D7
6. The master asserts a stop condition on SDA, and
1. The master asserts a start condition on SDA.
2. The master sends the 7−bit slave address followed
3. The addressed slave device asserts ACK on SDA.
4. The master sends the register address. The MSB of
5. The slave asserts ACK on SDA.
6. The master sends a data byte.
7. The slave asserts ACK on SDA.
8. The master asserts a stop condition on SDA to end
D7
1
1
the transaction ends.
by a write bit (low).
the register address should equal 0 for a write byte
operation. If the MSB equals 1, a block write
operation takes place.
the transaction.
S
D6
D6
ADDRESS
Figure 21. Write Byte Operation
ADDRESS POINTER REGISTER BYTE
SLAVE
D5
S
D5
DATA BYTE FROM ADM1034
ADDRESS
Figure 20. Send Byte
SLAVE
D4
D4
W A
FRAME 2
FRAME 2
D3
D3
ADDRESS
W A
REG
D2
D2
ADDRESS
REG
A
D1
D1
DATA
A P
D0
D0
NO ACK. BY
ADM1033
ADM1033
ACK. BY
A
9
9
P
STOP BY
STOP BY
MASTER
MASTER