ADM1033ARQZ-REEL7 ON Semiconductor, ADM1033ARQZ-REEL7 Datasheet - Page 20

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ADM1033ARQZ-REEL7

Manufacturer Part Number
ADM1033ARQZ-REEL7
Description
IC THERM/FAN SPEED CTRLR 16-QSOP
Manufacturer
ON Semiconductor
Datasheet

Specifications of ADM1033ARQZ-REEL7

Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
THERM % Limit Register
ALERT is generated, if THERM is asserted for longer than
the programmed percentage limit. The limit is programmed
as a percentage of the chosen time window.
THERM % limit register is an 8−bit register.
0x00 = 0%
0xFF = 100%
Therefore, 1 LSB = 0.39%.
Example:
is to be generated if THERM is asserted for more than 1
second, program the following value to the limit register:
% Limit = 1/8 x 100 = 12.5%
12.5% / 0.39% = 32d = 0x20 = 0010 0000
after the time window has elapsed, assuming it is not
masked.
Fan Drive Signal
Varying the duty cycle (on/off time) of a square wave
applied to the fan varies the speed of the fan. The ADM1033
uses a control method called synchronous speed control, in
which the PWM drive signal applied to the fan is
synchronized with the fan’s TACH signal. See the
Synchronous Speed Control section for more information.
simple. A single N−channel MOSFET is the only drive
device required. The specifications of the MOSFET depend
on the maximum current required by the fan and the gate
voltage drive (V
pin). V
the gate is tied to 5.0 V. The MOSFET should also have a low
on−resistance to ensure that there is no significant voltage
drop across the FET. A high on−resistance reduces the
voltage applied across the fan and therefore the maximum
operating speed of the fan. Figure 33 shows a scheme for
driving a 3−wire fan.
Figure 33. Interfacing a 3−Wire Fan to the ADM1033
The THERM % limit is programmed to Register 0x19. An
If a time window of 8 seconds is chosen, and an ALERT
An ALERT is generated if the THERM limit is exceeded
The ADM1033 contols the speed of up to one cooling fan.
The external circuitry required to drive the fan is very
ADM1033
GS
DRIVE
TACH
can be greater than 3.0 V, as long as the pullup on
by Using an N−Channel MOSFET
GS
100kΩ
< 3.0 V for direct interfacing to the drive
4.7kΩ
3.3V
10kΩ
10kΩ
TACH
12V
12V
Q1
NDT3055L
12V
FAN
1N4148
http://onsemi.com
20
signal. This assumes that the TACH signal is an open
collector from the fan. In all cases, the fan’s TACH signal
must be kept below 5.0 V maximum to prevent damaging
the ADM1033.
totem pole TACH output, use one of the input signal
conditioning circuits shown in the Fan Inputs section.
make sure that the drive pins are not required to source
current and that they sink less than the maximum current
specified here.
Synchronous Speed Control
called synchronous speed control. In this scheme, the PWM
drive signal applied to the fan is synchronized with the
TACH signal. Accurate and repeatable fan speed
measurements are the main benefits. The fan is allowed to
run reliably at speeds as low as 30 percent of the full
capability.
the TACH signal. The ADM1033 switches on the drive
signal and waits for a transition on the TACH signal. When
a transition takes place on the TACH signal, the PWM drive
is switched off for a period of time called toff. The drive
signal is then switched on again. The toff time is varied in
order to vary the fan speed. If the fan is running too fast, the
toff time is increased. If the fan is running too slow, the toff
time is decreased.
signal, the frequency with which the fan is driven depends
on the current speed of the fan and the number of poles in it.
works. The ideal TACH signal is the TACH signal that
would be output from the fan if power were applied 100
percent of the time. It is representative of the actual speed of
the fan. The actual TACH signal is the signal the user would
see on the TACH output from the fan if the user were to put
a scope on it. In effect, the actual TACH signal is the ideal
TACH signal chopped with the drive signal.
Figure 33 uses a 10 kW pullup resistor for the TACH
If in doubt as to whether a fan has an open−collector or
When designing drive circuits with transistors and FETs,
The ADM1033 drives the fan by using a control scheme
The drive signal applied to the fan is synchronized with
Since the drive signal is synchronized with the TACH
Figure 34 shows how the synchronous speed drive signal

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