ADT7460ARQZ ON Semiconductor, ADT7460ARQZ Datasheet - Page 12
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ADT7460ARQZ
Manufacturer Part Number
ADT7460ARQZ
Description
IC REMOTE THRML/FAN CTRLR 16QSOP
Manufacturer
ON Semiconductor
Series
dBCool®r
Specifications of ADT7460ARQZ
Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 120°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 120°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Full Temp Accuracy
+/- 3 C
Digital Output - Bus Interface
Serial (3-Wire)
Maximum Operating Temperature
+ 120 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADT7460ARQZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
ADT7460ARQZ-REEL
Manufacturer:
ST
Quantity:
16
ADT7460
2.
3. When all data bytes have been read or written, stop conditio
Any number of bytes of data may be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation because the type of operation is determined at
Data is sent over the serial bus in sequences of nine clock
pulses, eight bits of data followed by an Acknowledge bit
from the slave device. Transitions on the data line must occ
during the low period of the clock signal and remain stable
during the high period, as a low-to-high transition when the
clock is high may be interpreted as a st
of data bytes that can be transmitted over the serial bus in a
single read or write operation is limited only by what the
master and slave devices can handle.
are established. In write
high during the 10th clock pulse to assert a stop condition. In
read mode, the master device overrides the acknowledge bit
by pulling the data line high during the low period
ninth clock pulse. This is known as No Acknowledge. The
master then takes the data line low during the low period
before the 10th clock pulse, then high during the 10th clock
pulse to assert a stop condition.
SDA
SCL
START BY
MASTER
Figure 18. Writing a Register Address to the Address Pointer Register, Then Writing Data to the Selected Register
1
0
mode, the master pulls the data line
1
0
SERIAL BUS ADDRESS
1
FRAME 1
op signal. The number
BYTE
SDA (CONTINUED)
1
SCL (CONTINUED)
A1
before the
A0
Rev. C | Page 12 of 52
ns
R/W
ur
ADT7460
ACK. BY
D7
9
1
D7
D6
1
the beginning and cannot subsequently be changed without
starting a new operation.
In the case of the ADT7460, write operations contain either one
or two bytes, and read operations contain one byte.
To write data to one of the device data re
from it, the address pointer register must be set so that the
correct data register is addressed. Then data can be written in
that register or read from it. The first byte of a write operation
always contains an address that is stored in the address pointer
register. If data is to be written to the device, the write operation
contains a second data byte that is written to the register
selected by the addres
This is i
the bus followed by R/ W
data bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the address pointer
register. The second data byte is the data to be written to the
internal data register.
D6
D5
ADDRESS POINTER REGISTER BYTE
llustrated in Figure 18. The device address is sent over
D5
D4
FRAME 3
DATA
BYTE
D4
D3
FRAME 2
D3
D2
s pointer register.
being set to 0. This is followed by two
D2
D1
D0
D1
ADT7460
ACK. BY
D0
9
ADT7460
ACK. BY
gisters or read data
STOP BY
9
MASTER