FAN5018BMTCX Fairchild Semiconductor, FAN5018BMTCX Datasheet - Page 25

• Manufacturer Part Number: FAN5018BMTCX
• Description: IC CTRLR DC-DC MULTIPH 28TSSOP
• Manufacturer: Fairchild Semiconductor

Specifications of FAN5018BMTCX

• Applications: Controller, High-Current, Implementing Low-Voltage CPU Core Power Circuits
• Voltage - Input: 12V
• Number Of Outputs: 1
• Voltage - Output: 0.5 ~ 3.5 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRODUCT SPECIFICATION
Choosing the closest standard values for these components
yields: C
33pF.
C
In continuous inductor-current mode, the source current of
the high-side MOSFET is approximately a square wave with
a duty ratio equal to n (V
nth of the maximum output current. To prevent large voltage
transients, use a low ESR input capacitor sized for the maxi-
mum rms current. The maximum rms capacitor current is
given by:
Figure 6. Typical Transient Response for Design Example
Note that the capacitor manufacturer’s ripple current ratings
are often based on only 2000 hours of life. This makes it
advisable to further derate the capacitor, or to choose a
capacitor rated at a higher temperature than required. Several
capacitors may be placed in parallel to meet size or height
requirements in the design. In this example, the input
capacitor bank is formed by three 2200µF, 16V Nichicon
capacitors with a ripple current rating of 3.5A each.
To reduce the input-current di/dt to below the recommended
maximum of 0.1A/µs, insert an additional small inductor (L
> 1µH @ 15A) between the converter and the supply bus.
That inductor also acts as a filter between the converter and
the primary power source.
REV. 1.0.0 Jul/15/05
R
I
I
IN
CRMS
CRMS
CS
( 2
Selection and Input Current di/dt Reduction
NEW
=
=
. 0
D
A
)
125
=
×
= 390pF, R
R
I
O
CS
×
×
65
( 2
OLD
A
n
×
)
×
1
×
A
D
(
3
V
(
V
= 16.9k
−
×
OUT
NL
NL
1
. 0
1
−
125
−
/V
V
V
FLCOLD
FLHOT
IN
Ω
−
, C
) and an amplitude of one-
1
=
B
)
)
10
= 1.5nF, and C
5 .
A
FB
(34)
(35)
=
Tuning Procedure for the FAN5018B
DC Load Line Setting
1.
2.
3.
4.
5.
6.
7.
8.
9.
Build a circuit based on compensation values computed
from the design spreadsheet.
Hook up DC load to circuit, turn on and verify opera-
tion. Also check for jitter at no-load and full-load.
Measure output voltage at no-load (V
within tolerance.
Measure output voltage at full-load cold (V
Let board soak for ~10 minutes at full-load and measure
output (V
couple of millivolts, adjust R
Equations 35 and 37.
Repeat Step 4 until cold and hot voltage measurements
remain the same.
Measure output voltage from no-load to full-load using
5 Amp steps. Compute the loadline slope for each
change and then average to get overall loadline slope
(R
If R
use the following to adjust the R
Repeat Steps 6 and 7 to check loadline and repeat
adjustments if necessary.
Once the DC loadline adjustment is completed, do not
change R
dure.
R
PH
100
OMEAS
80
60
40
20
0
OMEAS
(
NEW
Figure 7. Efficiency vs. Output Current
0
)
).
PH
FLHOT
=
is off from R
R
, R
10
PH
CS1
(Circuit of Figure 5)
(
). If there is a change of more than a
OLD
, R
OUTPUT CURRENT (A)
)
20
×
CS2
R
OMEAS
O
R
, or R
O
by more than 0.05 m
30
CS1
TH
PH
and R
for the rest of proce-
40
values:
NL
CS2
). Verify it is
50
using
FLCOLD
FAN5018B
Ω
,
(36)
60
).
25