MAX17082GTL+ Maxim Integrated Products, MAX17082GTL+ Datasheet - Page 29

• Manufacturer Part Number: MAX17082GTL+
• Description: IC CTLR PWM DUAL IMVP-6.5 40TQFN
• Manufacturer: Maxim Integrated Products
• Series: Quick-PWM™r

Specifications of MAX17082GTL+

• Applications: Controller, Intel IMVP-6.5™
• Voltage - Input: 4.5 ~ 5.5 V
• Number Of Outputs: 1
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Lead Free Status / Rohs Status: Details

Table 3. Operating Mode Truth Table
*Multiphase operation—all enabled phases active.
Falling
Rising
SHDN
GND
High
High
High
High
High
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
DPRSTP
(SLOW)
(High)
(High)
(High)
(Low)
High
Low
X
X
X
X
X
X
INPUTS
______________________________________________________________________________________
DPRSLPVR
Dual-Phase, Quick-PWM Controllers for
High
High
Low
Low
X
X
X
X
High
Low
PSI
X
X
X
X
X
X
1-phase forced-
pulse-skipping
1-phase pulse-
1-phase pulse-
1/8 R
1/8 R
nominal R
nominal R
nominal R
OPERATION*
forced-PWM
forced-PWM
Multiphase
Multiphase
Multiphase
Disabled
Disabled
slew rate
slew rate
skipping
slew rate
skipping
PHASE
PWM
TIME
TIME
rate
rate
slew
TIME
TIME
TIME
slew
Low-Power Shutdown Mode. DL1 and DL2 forced low, and the
controller is disabled. The supply current drops to 1μA (max).
Startup/Boot. When
MAX17082/MAX17482 begin the startup sequence. The controller
enables the PWM regulator and ramps the output voltage up to the
boot voltage. See Figure 10.
Full Power. The no-load output voltage is determined by the
selected VID DAC code (D0–D6, Table 4).
Intermediate Power. The no-load output voltage is determined by
the selected VID DAC code (D0–D6, Table 4). When
low, the MAX17021/MAX17082/MAX17482 immediately disable
phase 2. DH2 and DL2 are pulled low.
Deeper Sleep Mode. The no-load output voltage is determined
by the selected VID DAC code (D0–D6, Table 4). When
DPRSLPVR is pulled high, the MAX17021/MAX17082/MAX17482
immediately enter one-phase pulse-skipping operation, allowing
automatic PWM/PFM switchover under light loads. The PWRGD
and
transitions. DH2 and DL2 are pulled low.
Deeper Sleep Slow Exit Mode. The no-load output voltage is
determined by the selected VID DAC code (D0–D6, Table 4).
When
the MAX17021 remains in one-phase pulse-skipping operation,
allowing automatic PWM/PFM switchover under light loads, but
reduces its slew rate to 1/4 of normal. When
the MAX17082/MAX17482 reduce their slew rate to 1/2 of normal.
The PWRGD and
DL2 are pulled low.
Shutdown. When
MAX17482 immediately pull PWRGD and PHASEGD low,
becomes high, all enabled phases are activated, and the output
voltage is ramped down to ground. Once the output reaches 0V,
the controller enters the low-power shutdown state. See Figure 10.
Fault Mode. The fault latch has been set by the MAX17021/
MAX17082/MAX17482 UVP or thermal-shutdown protection, or by the
OVP protection. The controller remains in fault mode until V CC power
is cycled or
upper thresholds are blanked during downward
is pulled high while DPRSLPVR is already high,
toggled.
OPERATING MODE
is pulled low, the MAX17021/MAX17082/
upper thresholds are blanked. DH2 and
is pulled high, the MAX17021/
is pulled low,
is pulled
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