MAX8720ETX+ Maxim Integrated Products, MAX8720ETX+ Datasheet - Page 18

IC CNTRL VID STP DWN 36-TQFN

MAX8720ETX+

Manufacturer Part Number
MAX8720ETX+
Description
IC CNTRL VID STP DWN 36-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8720ETX+

Applications
Controller, CPU GPU
Voltage - Input
2 ~ 28 V
Number Of Outputs
1
Voltage - Output
0.28 ~ 1.85 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-TQFN Exposed Pad
Output Voltage
0.275 V to 1.85 V
Input Voltage
2 V to 28 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
When SHDN goes low, the MAX8720 enters low-power
shutdown mode. PGOOD goes low immediately. The
output voltage ramps down to 0V in 25mV steps at
1/4th the clock rate set by R
of the output voltage results in smaller negative induc-
tor currents, eliminating negative voltages on the out-
put. When the DAC reaches the 0V setting, DL goes
high, DH goes low, the reference is turned off, and the
supply current drops to approximately 10µA.
When SHDN goes high, the reference powers up, and
after the reference UVLO is passed, the DAC target is
evaluated and switching begins. The slew-rate controller
ramps up from 0V in 25mV steps at 1/4th the clock rate
set by R
(based on SUS). Full output current is available immedi-
ately. PGOOD goes high after the slew-rate controller
has terminated and the output voltage is in regulation.
The MAX8720 uses a multiplexer that selects from two
different inputs (Figure 7)—the VID DAC inputs or the
suspend-mode S0, S1 inputs. On startup, the MAX8720
slews the target voltage from ground to either the
decoded D0–D5 (SUS = low) voltage or the S0, S1 volt-
age (SUS = high).
Dynamically Adjustable 6-Bit VID
Step-Down Controller
Figure 6. Soft-Startup and Soft-Shutdown
18
Soft-Startup and Soft-Shutdown ( SHDN )
______________________________________________________________________________________
V
DL
MODE
SHDN
PGOOD
V
TIME
CC
CPU
Nominal Output Voltage Setting
to the currently selected code value
FORCED-PWM MODE
TIME
. The slow rampdown
CLOCKS
8x R
TIME
SOFT-STARTUP AND SHUTDOWN
1/4TH SLEW RATE SET BY R
The digital-to-analog converter (DAC) programs the out-
put voltage. It typically receives a preset digital code
from the CPU pins, which are either hardwired to GND
or left open-circuit. They can also be driven by digital
logic, general-purpose I/O, or an external mux. Do not
leave D0–D5 floating—use 1MΩ or less pullup resistors
if the inputs may float. D0–D5 can be changed while the
Figure 7. Internal Multiplexers Functional Diagram
TIME
SUS
D0
D1
D2
D3
D4
D5
S0
S1
FORCED-PWM MODE
IN
DECODER
S0/S1
CODE
6-BIT
OUT
CODE
6-BIT
0
1
SUS MUX
SEL
OUT
V
CC(UVLO)
DAC Inputs (D0–D5)
DAC
V
DL
PWM
SHDN
PGOOD
V
CC
CPU

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