ISL85033IRTZ-T Intersil, ISL85033IRTZ-T Datasheet - Page 19

• Manufacturer Part Number: ISL85033IRTZ-T
• Description: IC REG BUCK ADJ DUAL 28TQFN
• Manufacturer: Intersil
• Type: Step-Down (Buck)r

Specifications of ISL85033IRTZ-T

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.8 ~ 28 V
• Current - Output: 3A
• Frequency - Switching: 300kHz ~ 2MHz
• Voltage - Input: 4.5 ~ 28 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

Regarding transient response needs, a good starting
point is to determine the allowable overshoot in V
the load is suddenly removed. In this case, energy
stored in the inductor will be transferred to C
causing its voltage to rise. After calculating
capacitance required for both ripple and transient
needs, choose the larger of the calculated values. The
following equation determines the required output
capacitor value in order to achieve a desired overshoot
relative to the regulated voltage.
where V
overshoot allowed during the removal of the load. For
an overshoot of 5%, the equation becomes:
The graph in Figure 44 shows the relationship of C
and % overshoot at 3 different output voltages. L is
assumed to to be 7µH and I
Current Sharing Configuration
In current sharing configuration, FB1 is connected to
FB2, EN1 to EN2, COMP1 to COMP2 and VOUT1 to
VOUT2 as shown in Figure 3. As a result, the equivalent
gm doubles its single channel value. Since the two
channels are out-of-phase, the frequency will be 2X
the channel switching frequency. Ripple current
cancellation will reduce the ripple current seen by the
output capacitors and thus lower the ripple voltage.
This results in the ability to use less capacitance than
would be required by a single phase design of similar
rating. Ripple current cancellation also reduces the
ripple current seen at the input capacitors.
Input Capacitor Selection
To reduce the resulting input voltage ripple and to minimize
EMI by forcing the very high frequency switching current
into a tight local loop, an input capacitor is required. The
input capacitor must have adequate ripple current rating
which can be approximated by the Equation 9.
C
C
OUT
OUT
FIGURE 44. C
=
=
80
60
40
20
--------------------------------------------------------------------------------------------
V
---------------------------------------------------- -
V
OUTMAX
1.02
0
OUT
OUT
12V
I
2
OUT
2
* V
* 1.05
(
(
OUT
/V
2
OUT
OUTMAX
* L
1.04
I
OUT
OUT
2 1 )
–
5V
vs OVERSHOOT V
2
V
is the relative maximum
OUT
* L
OUTMAX
⁄
19
V
OUT
1.06
OUT
) 2 1 )
/V
3.3V
–
is 3A.
OUT
OUT
1.08
OUTMAX
OUT
/V
1.10
(EQ. 7)
(EQ. 8)
OUT
OUT
ISL85033
ISL85033
OUT
if
If capacitors other than MLCC are used, attention must
be paid to ripple and surge current ratings.
where D = V
The input ripple current is graphically represented in
Figure 45.
A minimum of 10µF ceramic capacitance is required on
each VIN pin. The capacitors must be as close to the IC as
physically possible. Additional capacitance may be used.
Loop Compensation Design
ISL85033 uses a constant frequency current mode
control architecture to achieve simplified loop
compensation and fast loop transient response.
The compensator schematic is shown in Figure 47. As
mentioned in the COUT selection, ISL85033 allows the
usage of low ESR output capacitor. Choice of the loop
bandwidth f
exceed 1/4 of the switching frequency. As a starting
point, the lower of 100kHz or 1/6 of the switching
frequency is reasonable. The following equations
determine initial component values for the
compensation, allowing the designer to make the
selection with minimal effort. Further detail is provided in
“Theory of Compensation” on page 20 to allow fine
tuning of the compensator.
Compensation resistor R1 is given by Equation 10:
which when applied to ISL85033 becomes:
R
where C
bandwidth [kHz] and V
Compensation capacitors C1 [nF], C2 [pF] are given by
Equation 12:
I
----------- -
R
RMS
Io
1
1
[
kΩ
=
0.6
0.5
0.4
0.3
0.2
0.1
=
0
2πf
-----------------------------------
]
=
0
g
o
D D
c
0.008247 ∗ f
m
V
FIGURE 45. I
is the output capacitor value [µF], f
–
o
V
C
c
FB
2
o
O
is somewhat arbitrary but should not
R
/V
T
0.2
IN
c
∗ V
o
∗ C
o
RMS
o
0.4
is the output voltage [V].
/I
O
D
vs DUTY CYCLE
0.6
December 8, 2010
0.8
c
= loop
(EQ. 11)
(EQ. 10)
(EQ. 9)
FN6676.2