ISL85033IRTZ-T Intersil, ISL85033IRTZ-T Datasheet - Page 22

• Manufacturer Part Number: ISL85033IRTZ-T
• Description: IC REG BUCK ADJ DUAL 28TQFN
• Manufacturer: Intersil
• Type: Step-Down (Buck)r

Specifications of ISL85033IRTZ-T

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.8 ~ 28 V
• Current - Output: 3A
• Frequency - Switching: 300kHz ~ 2MHz
• Voltage - Input: 4.5 ~ 28 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-WFQFN exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

Where:
V
the Schottky diode is critical in terms of the high
temperature reverse bias leakage current which is very
dependent on VIN and exponentially increasing with
temperature. Due to the nature of reverse bias leakage
vs temperature, the diode should be carefully selected
to operate in the worst case circuit conditions.
Catastrophic failure is possible if the diode chosen
experiences thermal runaway at elevated
temperatures. Please refer to Application Note for
diode selection.
Power Derating Characteristics
To prevent the ISL85033 from exceeding the maximum
junction temperature, some thermal analysis is required.
The temperature rise is given by Equation 28:
where PD is the power dissipated by the regulator and
θ
to the ambient temperature. The junction temperature,
T
where T
package, the θ
The actual junction temperature should not exceed the
absolute maximum junction temperature of +125°C
When considering the thermal design, remember to
consider the thermal needs of the rectifier diode.
The ISL85033 delivers full current at ambient
temperatures up to +85°C if the thermal impedance
from the thermal pad maintains the junction temperature
below the thermal shutdown level, depending on the
Input Voltage/Output Voltage combination and the
switching frequency. The device power dissipation must
be reduced to maintain the junction temperature at or
below the thermal shutdown level. Figure 49 illustrates
the power derating versus ambient temperature for the
ISL85033 EVAL kit. Note that the EVAL kit derating
curve is based on total circuit dissipation, not IC
dissipation alone.
T
T
J
JA
D
RISE
J
, is given by Equation 29:
=
is the voltage drop of the Schottky diode. Selection of
is the thermal resistance from the junction of the die
(
T
=
A
120
110
100
90
80
70
60
50
40
30
20
10
(
+
A
PD
0
FIGURE 49. POWER DERATING CURVE
T
0
is the ambient temperature. For the QFN
RISE
) θ
(
1
JA
)
JA
TOTAL POWER DISSIPATION (W)
)
2
ISL85033EVAL1ZB EVAL BOARD
is +38°C/W.
3
4
22
5
6
Θ
JA
7
= 38°C/W
8
9
10 11 12
(EQ. 28)
(EQ. 29)
ISL85033
Layout Considerations
Layout is very important in high frequency switching
converter design. With power devices switching
efficiently between 100kHz and 600kHz, the resulting
current transitions from one device to another cause
voltage spikes across the interconnecting impedances
and parasitic circuit elements. These voltage spikes can
degrade efficiency, radiate noise into the circuit, and lead
to device overvoltage stress. Careful component layout
and printed circuit board design minimizes these voltage
spikes.
As an example, consider the turn-off transition of the
upper MOSFET. Prior to turn-off, the MOSFET is carrying
the full load current. During turn-off, current stops
flowing in the MOSFET and is picked up by the Schottky
diode. Any parasitic inductance in the switched current
path generates a large voltage spike during the switching
interval. Careful component selection, tight layout of the
critical components, and short, wide traces minimizes the
magnitude of voltage spikes.
There are two sets of critical components in the
ISL85033 switching converter. The switching components
are the most critical because they switch large amounts
of energy, and therefore tend to generate large amounts
of noise. Next, are the small signal components which
connect to sensitive nodes or supply critical bypass
current and signal coupling.
A multi-layer printed circuit board is recommended.
Figure 50 shows the connections of the critical
components in the converter. Note that capacitors C
and C
capacitors. Dedicate one solid layer, usually a middle
layer of the PC board, for a ground plane and make all
critical component ground connections with vias to this
layer. Dedicate another solid layer as a power plane and
break this plane into smaller islands of common voltage
levels. Keep the metal runs from the PHASE terminals to
the output inductor short. The power plane should
support the input power and output power nodes. Use
copper filled polygons on the top and bottom circuit
layers for the phase nodes. Use the remaining printed
circuit layers for small signal wiring.
In order to dissipate heat generated by the internal LDO
and MOSFET, the ground pad should be connected to the
internal ground plane through at least four vias. This allows
the heat to move away from the IC and also ties the pad to
the ground plane through a low impedance path.
The switching components should be placed close to the
ISL85033 first. Minimize the length of the connections
between the input capacitors, C
switches by placing them nearby. Position both the
ceramic and bulk input capacitors as close to the upper
MOSFET drain as possible. Position the output inductor
and output capacitors between the upper and Schottky
diode and the load.
OUT
could each represent numerous physical
IN
, and the power
December 8, 2010
FN6676.2
IN