L6710 STMicroelectronics, L6710 Datasheet - Page 8

IC CTRLR 6BIT 2PH PROGR 44-TQFP

L6710

Manufacturer Part Number
L6710
Description
IC CTRLR 6BIT 2PH PROGR 44-TQFP
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheet

Specifications of L6710

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.84 ~ 1.6 V
Current - Output
2A
Frequency - Switching
150kHz
Voltage - Input
12V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Power - Output
2.5W
Product
Half-Bridge Drivers
Supply Current
12.5 mA
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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L6710
REFERENCE SCHEMATIC
DEVICE DESCRIPTION
The device is an integrated circuit realized in BCD technology. It provides complete control logic and pro-
tections for a high performance dual-phase step-down DC-DC converter optimized for microprocessor
power supply. It is designed to drive N Channel MOSFETs in a two-phase synchronous-rectified buck to-
pology. A 180 deg phase shift is provided between the two phases allowing reduction in the input capacitor
current ripple, reducing also the size and the losses.
The output voltage of the converter can be precisely regulated, programming the VID pins, from 0.8375 to
1.6000V with 12.5mV binary steps, with a maximum tolerance on the output regulated voltage of ±0.5%
over temperature and line voltage variations. Since the VID pins program the maximum output voltage,
the device automatically regulates to a voltage VID*=VID-25mV avoiding use of any external component
to lower the regulated voltage. Dynamic VID Code changes are managed stepping to the new configura-
tion following the VID table with no need for external components. The device provides an average cur-
rent-mode control with fast transient response. It includes a 150kHz oscillator externally adjustable
through a resistor. The error amplifier features a 15V/µs slew rate that permits high converter bandwidth
for fast transient performances.
Current information is read across the lower mosfets R
the LS mos in fully differential mode. The current information corrects the PWM output in order to equalize
the average current carried by each phase. Current sharing between the two phases is then limited at
±10% over static and dynamic conditions unless considering the sensing element spread.
The device protects against Over-Current, with an OC threshold for each phase, entering in constant cur-
rent mode. Since the current is read across the low side mosfets, the device keeps constant the bottom
of the inductors current triangular waveform. When an under voltage is detected the device latches and
the FAULT pin is driven high. The device performs also Over-Voltage protection that disables immediately
the device turning ON the lower driver and driving high the FAULT pin.
8/34
VID_Pgood
GNDin
Vin
S5
S4
S3
S2
S1
S0
L1
To VCC
HS1
LS1
Rg
Rg
To PGNDS
REF_OUT
HGATE1
PHASE1
LGATE1
VCCDR
BOOT1
ISEN1
SGND
VID5
VID4
VID3
VID2
VID1
VID0
OUTEN
41
3
43
42
40
19
28
27
26
25
24
12
6, 7
29
14
L6710
FBR
17
18
FBG
31
35
36
38
21
20
39
30
13
22
5
9
8
VCC
BOOT2
HGATE2
PHASE2
LGATE2
ISEN2
PGNDS
PGND
PGOOD
VSEN
FB
COMP
OSC / FAULT
dsON
Rg
Rg
or across a sense resistor placed in series to
R
R
C
FB
F
F
HS2
LS2
L2
C
C
OUT
IN
PGOOD
CPU

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