KSZ8695P Micrel Inc, KSZ8695P Datasheet - Page 27

• Manufacturer Part Number: KSZ8695P
• Description: IC ARM9 W/MMU PHY 10/100 289PBGA
• Manufacturer: Micrel Inc

Specifications of KSZ8695P

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 289-PBGA
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (min): 1.7/3V
• Operating Supply Voltage (max): 1.9/3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 289
• For Use With: 576-1623 - BOARD EVALUATION KSZ8695P-MMB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1509-5; KSZ8695P

UART Pins
General Purpose I/O Pins
Note:
1. I = Input.
Micrel, Inc.
May 2006
M16
M15
M14
N16
N14
N15
G17
G16
H17
H16
H15
H14
K17
K16
K15
K14
L15
L14
J17
J16
J15
J14
L17
L16
Pin
Pin
A3
O = Output.
I/O = Bidirectional.
O/I = Output in normal mode; input pin during reset.
CPUCLKSEL
DBGENN
SCANEN
UDCDN/
TSTRST
UDTRN/
URTSN/
UCTSN/
UDSRN
BISTEN
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO0/
GPIO1/
GPIO2/
GPIO3/
GPIO4/
GPIO5/
PRSTN
TOUT0
TOUT1
GPIO6
GPIO7
GPIO8
GPIO9
URXD
EINT0
EINT1
EINT2
EINT3
Name
UTXD
URIN/
Name
I/O Type
I/O Type
O/I
O/I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
(1)
(1)
Description
UART receive data.
UART transmit data.
UART data terminal ready. Active low.
DBGENN = 0 (factory reserved test signal)
UART data set ready. Active low.
Normal mode: UART request to send. Active low output.
During reset: CPU clock select. Select CPU clock source. CPUCLKSEL=0 (normal
mode), the internal PLL clock output is used as the CPU clock source.
CPUCLKSEL=1 (factory reserved test signal).
UART clear to send. BIST enable (factory reserved test signal).
UART data carrier detect. Scan enable (factory reserved test signal).
UART ring indicator. Chip test reset (factory reserved test signal).
Description
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. Timer 0 output pin.
General purpose I/O pin. Timer 1 output pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
PCI Reset. Active low. This signal is an input used to reset the KS8695P PCI logic.
If the KS8695P is the host, use the RESETN signal to drive this input. If the
KS8695P is a guest, use the system reset to drive this signal.
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M9999-051806
KS8695P