MT5VDDT1672HG-26AC3 Micron Technology Inc, MT5VDDT1672HG-26AC3 Datasheet - Page 10
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MT5VDDT1672HG-26AC3
Manufacturer Part Number
MT5VDDT1672HG-26AC3
Description
MODULE SDRAM DDR 128MB 200SODIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT5VDDT1672HY-335K1.pdf
(16 pages)
Specifications of MT5VDDT1672HG-26AC3
Memory Type
DDR SDRAM
Memory Size
128MB
Speed
266MT/s
Package / Case
200-SODIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
200SODIMM
Device Core Size
72b
Organization
16Mx72
Total Density
128MByte
Access Time (max)
75ps
Maximum Clock Rate
266MHz
Operating Supply Voltage (typ)
2.5V
Operating Current
925mA
Number Of Elements
5
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
200
Mounting
Socket
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 10:
PDF: 09005aef80a8e793/Source: 09005aef80a8e767
dd5c16_32x72h.fm - Rev. F 2/07 EN
Parameter/Condition
Operating one bank active-precharge current:
t
control inputs changing once every two clock cycles
Operating one bank active-read-precharge current: Burst = 4;
t
once per clock cycle
Precharge power-down standby current: All device banks idle; Power-down
mode;
Idle standby current: CS# = HIGH; All device banks idle;
HIGH; Address and other control inputs changing once per clock cycle; V
DQ, DQS, and DM
Active power-down standby current: One device bank active; Power-down mode;
t
Active standby current: CS# = HIGH; CKE = HIGH; One device bank; Active-
precharge;
twice per clock cycle; Address and other control inputs changing once per clock cycle
Operating current: Burst = 2; Reads; Continuous burst; One device bank active;
Address and control inputs changing once per clock cycle;
t
Operating current: Burst = 2; Writes; Continuous burst; One device bank active;
Address and control inputs changing once per clock cycle;
t
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating current: Four device bank interleaving READs (BL = 4) with auto
precharge;
during active READ or WRITE commands
CK =
RC =
CK =
CK =
CK =
t
t
t
t
t
CK (MIN); DQ, DM, and DQS inputs changing once per clock cycle; Address and
RC (MIN);
CK (MIN); CKE = LOW
CK (MIN); I
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
t
CK =
t
t
RC =
RC =
t
CK (MIN); CKE = (LOW)
DDR I
Values shown for MT46V32M16 DDR SDRAM only and are computed from values specified in the
512Mb (32 Meg x 16) component data sheet
t
t
CK =
t
OUT
RAS (MAX);
RC (MIN);
DD
= 0mA
t
CK (MIN); I
Specifications and Conditions – 256MB
t
CK =
t
CK =
OUT
t
CK (MIN); Address and control inputs change only
t
CK (MIN); DQ, DM, and DQS inputs changing
= 0mA; Address and control inputs changing
t
RC =
128MB, 256MB: (x72, ECC, SR) 200-Pin DDR SODIMM
t
RC (MIN);
t
CK =
10
t
t
REFC =
REFC = 7.8125µs
t
CK (MIN); CKE =
t
RFC (MIN)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
IN
= V
REF
for
Symbol
I
I
I
I
I
I
I
DD
I
I
DD
I
DD
I
I
DD
DD
DD
DD
Electrical Specifications
DD
DD
DD
DD
DD
4W
3N
4R
5A
2P
2F
3P
0
1
5
6
7
©2004 Micron Technology, Inc. All rights reserved.
1,725
2,250
-40B
775
925
275
225
300
950
975
25
55
25
1,450
2,025
-335
650
800
225
175
250
825
775
25
50
25
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA