AFBR-59M5LZ Avago Technologies US Inc., AFBR-59M5LZ Datasheet - Page 12

• Manufacturer Part Number: AFBR-59M5LZ
• Description: TXRX OPT 850NM SFF 2X6
• Manufacturer: Avago Technologies US Inc.

Specifications of AFBR-59M5LZ

• Applications: Ethernet
• Data Rate: 2.215Gbd
• Wavelength: 850nm
• Voltage - Supply: 2.97 V ~ 3.63 V
• Connector Type: LC Duplex
• Mounting Type: Through Hole
• Data Rate Max: 2.125Gbps
• Supply Voltage: 3.3V
• Wavelength Typ: 850nm
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 9. Transceiver Soft Diagnostic Timing Characteristics
(T
Notes:
1. Time from rising edge of TX_DISABLE to when the optical output falls below 10% of nominal.
2. Time from falling edge of TX_DISABLE to when the modulated optical output rises above 90% of nominal.
3. Time from power on or falling edge of Tx_Disable to when the modulated optical output rises above 90% of nominal.
4. Time TX_DISABLE must be held high to reset the laser fault shutdown circuitry.
5. Time from loss of optical signal to Signal Detect De-Assertion.
6. Time from valid optical signal to Signal Detect Assertion.
7. Time from two-wire interface assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the optical output falls below 10% of nominal. Measured from
8. Time from two-wire interface de-assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the modulated optical output rises above 90% of nominal.
9. Time from fault to two-wire interface TX_FAULT (A2h, byte 110, bit 2) asserted.
10. Time for two-wire interface de-assertion of Signal Detect (A2h, byte 110, bit 1) from loss of optical signal.
11. Time for two-wire interface assertion of Signal Detect (A2h, byte 110, bit 1) from presence of valid optical signal.
12. From power on to data ready bit asserted (A2h, byte 110, bit 0). Data ready indicates analog monitoring circuitry is functional.
13. Time from power on until module is ready for data transmission over the serial bus (reads or writes over A0h and A2h).
14. Time from stop bit to completion of a 1-8 byte write command.
Table 10. PCB Assembly Process Compatibility
12
Parameter
Hardware TX_DISABLE Assert Time
Hardware TX_DISABLE Negate Time
Time to initialize
Hardware TX_DISABLE to Reset
Hardware Signal_Detect Deassert Time
Hardware Signal_Detect Assert Time
Software TX_DISABLE Assert Time
Software TX_DISABLE Negate Time
Software Tx_FAULT Assert Time
Software Signal_Detect DeAssert Time
Software Signal_Detect Assert Time
Analog parameter data ready
Serial bus hardware ready
Write Cycle Time
Serial ID Clock Rate
Parameter
Hand Lead Soldering Temperature/Time
Wave Soldering and Aqueous Wash
Aqueous Wash Pressure
C
falling clock edge after stop bit of write transaction.
= -10°C to +70°C, V
CC
T, V
CC
R = 3.3 V ± 10%)
Symbol
t_off
t_on
t_init
t_reset
t_loss_on
t_loss_off
t_off_soft
t_on_soft
t_fault_soft
t_loss_on_soft
t_loss_off_soft
t_data
t_serial
t_write
f_serial_clock
Symbol
T
T
SOLD
SOLD
/t
/t
SOLD
SOLD
Minimum Typical
Minimum Typical
10
Maximum
+ 260/10
+ 260/10
110
Maximum
10
1
300
100
100
100
100
100
100
100
1000
300
10
400
Unit
°C/sec
°C/sec
psi
Unit
Ps
ms
ms
Ps
Ps
Ps
ms
ms
ms
ms
ms
ms
ms
ms
kHz
Notes
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Notes