KIT33880DWBEVB Freescale Semiconductor, KIT33880DWBEVB Datasheet - Page 15

• Manufacturer Part Number: KIT33880DWBEVB
• Description: KIT EVAL FOR MC33880 8X SW W/SPI
• Manufacturer: Freescale Semiconductor

Specifications of KIT33880DWBEVB

• Main Purpose: Power Management, High & Low Side Driver (Internal FET)
• Embedded: No
• Utilized Ic / Part: MC33880
• Primary Attributes: 8 Configurable High/Low FETs, 5.5 ~ 24.5V, 0.8 ~ 2A, 0.55 Ohm
• Secondary Attributes: SPI Interface, Reverse Battery, Temperature, Short Circuit, Current Limit Protection
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MCU INTERFACE DESCRIPTION
switch serving as a microcontroller (MCU) bus expander and
buffer, with fault management and fault reporting features. In
doing so, the device directly relieves the MCU of the fault
management functions. This device directly interfaces to an
MCU using a Serial Peripheral Interface (SPI) for control and
diagnostic readout.
illustrate the basic SPI configuration between an MCU and
one 33880.
levels and incorporate positive logic. Whenever an input is
programmed to a logic low state (<0.8 V) the corresponding
output will be OFF. Conversely, whenever an input is
programmed to a logic high state (>2.2 V), the output being
controlled will be ON. Diagnostics are treated in a similar
manner. Outputs with a fault will feedback (via DO) to the
microcontroller as a logic [1] while normal operating outputs
will provide a logic [0].
the 33880. Data from the MCU is clocked daisy chain through
each device while the Chip Select (
by the MCU. During each clock cycle output status from the
daisy chain, the 33880 is being transferred to the MCU via the
Analog Integrated Circuit Device Data
Freescale Semiconductor
In operation, the 33880 functions as an eight-output serial
All inputs are compatible with 5.0 V and 3.3 V CMOS logic
Figure 22
Microcontroller
Shift Regist
Figure 21. SPI Interface with Microcontroller
MC68HCxx
Receive
Parallel
Buffer
Ports
illustrates the Daisy Chain configuration using
er
Figure 21
MOSI
MISO
SCLK
CS
and
DO
Figure
CS
DI
) bit is commanded low
FUNCTIONAL DEVICE OPERATION
24, page 16,
Shift Register
33880
Logic
To
OPERATIONAL MODES
Master In Slave Out (MISO) line. On rising edge of
stored in the input register is then transferred to the output
driver.
fashion using the SPI.
controlled by three dedicated parallel MCU ports used for
chip select.
Microcontroller
Interface
MC68xx
Multiple 33880 devices can be controlled in a parallel input
Parallel
MCU
MC68xx
with
SPI
Ports
SPI
Figure 22. 33880 SPI System Daisy Chain
Figure 23. Parallel Input SPI Control
MISO
MOSI
C
SCLK
A
B
Parallel Port
MOSI
SCLK
MISO
CS
DO
8 Outputs
33880
Figure 23
DI
FUNCTIONAL DEVICE OPERATION
DO
CS
8 Outputs
illustrates 24 loads being
33880
SCLK
OPERATIONAL MODES
DI
SCLK
DO
CS
DI
SCLK
DO
CS
DI
SCLK
DO
CS
DI
DO
CS
8 Outputs
33880
8 Outputs
8 Outputs
8 Outputs
SCLK
CS
DI
data
33880
15