DK-SI-4S100G2N Altera, DK-SI-4S100G2N Datasheet - Page 19

• Manufacturer Part Number: DK-SI-4S100G2N
• Description: KIT DEV STRATIX IV TRANSCEIVER
• Manufacturer: Altera
• Series: Stratix® IVr

Specifications of DK-SI-4S100G2N

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: EP4S100G2F40C2ES1
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GT
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2603

Chapter 6: Stratix IV GT Transceiver Signal Integrity Demonstration
Running the Demonstration Application and Test Designs
© December 2009 Altera Corporation
Parameter
Statistics
Inject Error
Data Patrst
Data Rate
GXB Encoding
DataChk Status
CDRLock Mode
Freeze Display
Description
Displays the BER, number of bits received, number of errors received, and the error slope based on the
selection from the list.
The error slope shows the error trend (increase or decrease). You can use this statistic to determine
whether the PMA control settings must be increased or decreased to get an error free link.
Injects errors in the channels. Every time this button is asserted, one-bit error is introduced.
Reset for the data pattern generators and checkers.
Based on the test design selected, the application displays the serial data rate of the transceiver
channels.
Displays whether the data sent by the test design is 8B/10B encoded.
The DataChk Status field displays the following:
■
■
■
Shows whether the transceiver Clock Recovery Unit (CRU) is locked to the reference clock or to the
data. When the transceiver locks to the incoming data, this field displays data indicating that the
receive PLL has recovered the clock from the incoming data.
When you click the Freeze display button, the display field does not change and the counting
continues. When you click the Unfreeze display, the current running values are shown.
Link Statistics Tab
The Link Statistics settings include the following options:
Power and Temperature Tab
The application displays the Stratix IV device junction temperature. It also shows the
power or current values for the six supply rails.
You can also observe the power and temperature values on the LCD. For more
information, refer to
■
synced status displayed in green indicates that the error checker has received the predefined header
byte and no errors are detected.
unsynced status displayed in gray indicates that the error checker has not received the selected
pattern.
error status indicates that the error checker is detecting errors in the received pattern.
If the DataChk Status field shows unsynced, check whether the transmitter of the channel
showing unsynced is connected to the receiver channel by external cable or by internal serial
loopback. However, when sending the high frequency data pattern, the DataChk Status shows
unsynced. This is because the error checker is not provided for high frequency pattern.
“LCD Information” on page
Transceiver Signal Integrity Development Kit, Stratix IV GT Edition User Guide
6–2.
6–5