AD9520-4/PCBZ Analog Devices Inc, AD9520-4/PCBZ Datasheet - Page 2

BOARD EVAL FOR AD9520-4

AD9520-4/PCBZ

Manufacturer Part Number
AD9520-4/PCBZ
Description
BOARD EVAL FOR AD9520-4
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD9520-4/PCBZ

Design Resources
Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9520-4
Primary Attributes
1.4 ~ 1.8 GHz Output Frequency
Secondary Attributes
Accepts CMOS, LVDS, or LVPECL References Up to 250 MHz
Silicon Manufacturer
Analog Devices
Application Sub Type
PLL Clock Synthesizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9520-0, AD9520-2, AD9520-2
Silicon Family Name
AD9520-X
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
UG-076
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
AD9520 Evaluation Board ............................................................... 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Evaluation Board Software .............................................................. 4
Quick Start Guide to the AD9520 PLL .......................................... 5
Evaluation Software Components .................................................. 7
REVISION HISTORY
1/10—Revision 0: Initial Version
Power and PC Connections ........................................................ 3
Signal Connections ...................................................................... 3
Bypassing the Wall Power Supply ............................................... 3
Bypassing the PLL (Clock Distribution Only) ............................. 3
Using an External VCXO ............................................................ 3
Using I
Software Installation .................................................................... 4
Running the Software .................................................................. 4
Main Window ............................................................................... 7
PLL Reference INput Window .................................................... 8
PLL Configuration Window ....................................................... 8
REFMON, STATUS, and LD Buttons ........................................ 8
Register W/R Box ......................................................................... 9
2
C Serial Port Mode ......................................................... 3
Rev. 0 | Page 2 of 16
Evaluation Software Menu Items.................................................. 13
AD9520 PLL Loop Filter ............................................................... 14
Using the Evaluation Board to Program an AD9520 on a
Customer Board .............................................................................. 15
AD9520 Binary File Generation ................................................... 16
SYNC, PD (Power Down), and RESET Buttons .......................9
EEPROM Control Window .........................................................9
Reference (R) Divider Window ...................................................9
Feedback (N) Divider Window ................................................ 10
R and N Delay Window ............................................................. 10
Phase Frequency Detector (PFD) Window ............................ 10
Charge Pump Setup Window ................................................... 11
Zero Delay Window ................................................................... 11
VCO Calibration Window ........................................................ 11
Channel Divider Window ......................................................... 11
Output Driver Window ............................................................. 12
Debug Window ........................................................................... 12
Menu Bar ..................................................................................... 13
Checksum Generation ............................................................... 16
Avoiding Checksum Mismatches ............................................. 16
ESD Caution................................................................................ 16
Evaluation Board User Guide

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