SI3220PPT0-EVB Silicon Laboratories Inc, SI3220PPT0-EVB Datasheet - Page 8

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SI3220PPT0-EVB

Manufacturer Part Number
SI3220PPT0-EVB
Description
BOARD EVAL W/SI3200 INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet

Specifications of SI3220PPT0-EVB

Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3220
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Table 3. 3.3 V Power Supply Characteristics
(V
Si3220/25 Si3200/02
8
Parameter
Chipset Power
Consumption
Notes:
DD
1. All specifications are for a single channel based on measurements with both channels in the same operating state.
2. See "3.14.4. Ringing Power Considerations" on page 54 for current and power consumption under other operating
3. Power consumption does not include additional power required for dc loop feed. Total system power consumption must
, V
DD1
conditions.
include an additional (V
– V
DD4
=
3.3 V, T
A
P
Symbol
P
=
P
P
ACTIVE
DD
P
P
SLEEP
OPEN
STBY
0 to 70 °C for K/F-Grade, –40 to 85 °C for B/G-Grade)
RING
OHT
+ |V
3
BAT
|) x I
Open (high-impedance), V
Forward/reverse OHT, OBIAS = 4 mA,
Active on-hook standby, V
LOOP
Forward/reverse active off-hook,
ABIAS = 4 mA, V
V
term.
Sleep mode, RESET = 0,
Ringing, V
BAT
1
= –70 V, 1 REN load
Test Condition
(Continued)
V
V
Rev. 1.3
BAT
BAT
RING
= –70 V
= –70 V
BAT
= 45 v
= –24 V
BAT
BAT
rms
= –70 V
= –70 V
,
2
Min
Typ
267
757
541
69
89
8
Max
Unit
mW
mW
mW
mW
mW
mW

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