SI3220PPT0-EVB Silicon Laboratories Inc, SI3220PPT0-EVB Datasheet - Page 90

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SI3220PPT0-EVB

Manufacturer Part Number
SI3220PPT0-EVB
Description
BOARD EVAL W/SI3200 INTERFACE
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet

Specifications of SI3220PPT0-EVB

Main Purpose
Interface, Analog Front End (AFE)
Utilized Ic / Part
Si3220
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Si3220/25 Si3200/02
Figures 60 and 61 are example timing diagrams of a register read and a register write to the Dual ProSLIC using
the GCI. As noted in Figure 59, the transmitter should always anticipate the acknowledgement of the receiver for
correct communication with the Dual ProSLIC. Devices that do not accept this “best case” timing scenario will
not be able to communicate with the Dual ProSLIC.
90
Rev. 1.3

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