EVAL-AD7652CBZ Analog Devices Inc, EVAL-AD7652CBZ Datasheet
EVAL-AD7652CBZ
Specifications of EVAL-AD7652CBZ
Related parts for EVAL-AD7652CBZ
EVAL-AD7652CBZ Summary of contents
Page 1
FEATURES Throughput: 500 kSPS 16-bit resolution Analog input voltage range 2 pipeline delay Parallel and serial 5 V/3 V interface ® SPI /QSPI /MICROWIRE /DSP compatible Single 5 V supply operation Power dissipation ...
Page 2
... Power Dissipation versus Throughput .................................... 19 Conversion Control.................................................................... 19 Digital Interface .......................................................................... 20 REVISION HISTORY Revision 0, Initial Version. Parallel Interface ......................................................................... 20 Serial Interface ............................................................................ 20 Master Serial Interface ............................................................... 21 Slave Serial Interface .................................................................. 22 Microprocessor Interfacing....................................................... 24 Application Hints............................................................................ 25 Bipolar and Wider Input Ranges .............................................. 25 Layout .......................................................................................... 25 Evaluating the AD7652’s Performance .................................... 25 Outline Dimensions ....................................................................... 26 Ordering Guide........................................................................... 26 Rev Page ...
Page 3
SPECIFICATIONS Table 2. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted Parameter RESOLUTION ANALOG INPUT Voltage Range Operating Input Voltage Analog Input CMRR Input Current 1 Input Impedance THROUGHPUT ...
Page 4
AD7652 Parameter DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS Data Format 5 6 Pipeline Delay POWER SUPPLIES Specified Performance AVDD DVDD OVDD Operating Current AVDD 8 9 AVDD 10 ...
Page 5
TIMING SPECIFICATIONS Table 3. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted Parameter Refer to Figure 26 and Figure 27 Convert Pulsewidth Time between Conversions CNVST LOW to BUSY ...
Page 6
AD7652 Table 4. Serial Clock Timings in Master Read after Convert DIVSCLK[1] DIVSCLK[0] SYNC to SCLK First Edge Delay Minimum Internal SCLK Period Minimum Internal SCLK Period Maximum Internal SCLK HIGH Minimum Internal SCLK LOW Minimum SDOUT Valid Setup Time ...
Page 7
ABSOLUTE MAXIMUM RATINGS 1 Table 5. AD7652 Stress Ratings TEMP , REF, REFBUFIN, AVDD + 0 INGND, REFGND to AGND AGND – 0.3 V Ground Voltage Differences AGND, DGND, OGND ±0.3 V Supply Voltages ...
Page 8
AD7652 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions Pin No. Mnemonic Type 1 Description 1, 36, AGND P Analog Power Ground Pin. 41 AVDD P Input Analog Power Pin. Nominally ...
Page 9
Pin No. Mnemonic Type 1 Description DI/O When SER/PAR is LOW, this output is used as Bit 7 of the parallel port data output bus. RDC/SDIN When SER/PAR is HIGH, this input, part of the serial port, ...
Page 10
AD7652 Pin No. Mnemonic Type 1 Description 45 TEMP AO Temperature Sensor Voltage Output. 46 REFBUFIN AI/O Reference Input Voltage. The reference output and the reference buffer input. 47 PDREF DI This pin allows the choice of internal or external ...
Page 11
DEFINITIONS OF SPECIFICATIONS Integral Nonlinearity Error (INL) Linearity error refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs ½ LSB before ...
Page 12
AD7652 TYPICAL PERFORMANCE CHARACTERISTICS –1 –2 –3 –4 0 16384 32768 CODE Figure 5. Integral Nonlinearity vs. Code 140000 120000 111974 112112 100000 80000 60000 40000 25889 20000 477 7FFB 7FFC 7FFD ...
Page 13
SFDR –70 –80 –90 –100 THD –110 SECOND HARMONIC –120 1 10 100 FREQUENCY (kHz) Figure 11. THD, Harmonics, and SFDR vs. Frequency SNR 84 S/[N+ –60 –50 –40 –30 –20 INPUT LEVEL ...
Page 14
AD7652 2.5000 2.4995 2.4990 2.4985 2.4980 2.4975 2.4970 –40 – TEMPERATURE (°C) Figure 17. Typical Reference Output Voltage vs. Temperature –30 –26 –22 –18 –14 –10 ...
Page 15
CIRCUIT INFORMATION IN REF REFGND 32,768C INGND The AD7652 is a very fast, low power, single supply, precise 16-bit analog-to-digital converter (ADC). The AD7652 provides the user with an on-chip track/hold, successive approximation ADC that does not exhibit any pipeline ...
Page 16
AD7652 Transfer Functions Using the OB/ 2C digital input, the AD7652 offers two output codings: straight binary and twos complement. The LSB size is V /65536, which is about 38.15 µV. The AD7652’s ideal REF transfer characteristic is shown in ...
Page 17
TYPICAL CONNECTION DIAGRAM Figure 22 shows a typical connection diagram for the AD7652. Analog Input Figure 23 shows an equivalent circuit of the input structure of the AD7652. The two diodes, D1 and D2, provide ESD protection for the analog ...
Page 18
AD7652 Voltage Reference Input The AD7652 allows the choice of either a very low temperature drift internal voltage reference or an external 2.5 V reference. Unlike many ADCs with internal references, the internal reference of the AD7652 provides excellent performance ...
Page 19
POWER DISSIPATION VERSUS THROUGHPUT Operating currents are very low during the acquisition phase, allowing significant power savings when the conversion rate is reduced (see Figure 25 ). The AD7652 automatically reduces its power consumption at the end of each conversion ...
Page 20
AD7652 DIGITAL INTERFACE The AD7652 has a versatile digital interface; it can be interfaced with the host system by using either a serial or a parallel interface. The serial interface is multiplexed on the parallel data bus. The AD7652 digital ...
Page 21
MASTER SERIAL INTERFACE Internal Clock The AD7652 is configured to generate and provide the serial data clock SCLK when the EXT/ INT pin is held LOW. The AD7652 also generates a SYNC signal to indicate to the host when the ...
Page 22
AD7652 SLAVE SERIAL INTERFACE External Clock The AD7652 is configured to accept an externally supplied serial data clock on the SCLK pin when the EXT/ INT pin is held HIGH. In this mode, several methods can be used to read ...
Page 23
External Discontinuous Clock Data Read After Conversion Though the maximum throughput cannot be achieved using this mode the most recommended of the serial slave modes. Figure 34 shows the detailed timing diagrams of this method. After a conversion ...
Page 24
AD7652 MICROPROCESSOR INTERFACING The AD7652 is ideally suited for traditional dc measurement applications supporting a microprocessor, and for ac signal processing applications interfacing to a digital signal processor. The AD7652 is designed to interface either with a parallel 8-bit or ...
Page 25
... OGND is connected to the digital system ground. EVALUATING THE AD7652’S PERFORMANCE A recommended layout for the AD7652 is outlined in the EVAL-AD7652 evaluation board package includes a fully assembled and tested evaluation board, documentation, and software for controlling the board from a PC via the Rev Page AD7652 ...
Page 26
... EVAL-AD7652CB 2 EVAL-CONTROL BRD2 1 This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/demonstration purposes. 2 This board allows control and communicate with all Analog Devices evaluation boards ending in the CB designators. 0.75 1.60 0.60 MAX 0.45 SEATING PLANE 10° ...
Page 27
NOTES Rev Page AD7652 ...
Page 28
AD7652 NOTES © 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02965–0–9/03(0) Rev Page ...