LM3205TLEV National Semiconductor, LM3205TLEV Datasheet - Page 12

• Manufacturer Part Number: LM3205TLEV
• Description: BOARD EVALUATION LM3205TL
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LM3205TLEV

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 0.8 ~ 3.6V
• Current - Output: 650mA
• Voltage - Input: 2.7 ~ 5.5V
• Regulator Topology: Buck
• Frequency - Switching: 2MHz
• Board Type: Fully Populated
• Utilized Ic / Part: LM3205
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Power - Output: -

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Circuit Operation
Referring to Figure 1 and Figure 2, the LM3205 operates as
follows. During the first part of each switching cycle, the con-
trol block in the LM3205 turns on the internal PFET (P-
channel MOSFET) switch. This allows current to flow from the
input through the inductor to the output filter capacitor and
load. The inductor limits the current to a ramp with a slope of
around (V
During the second part of each cycle, the controller turns the
PFET switch off, blocking current flow from the input, and then
turns the NFET (N-channel MOSFET) synchronous rectifier
on. In response, the inductor’s magnetic field collapses, gen-
erating a voltage that forces current from ground through the
synchronous rectifier to the output filter capacitor and load.
As the stored energy is transferred back into the circuit and
depleted, the inductor current ramps down with a slope
around V
when the inductor current is high, and releases it when low,
smoothing the voltage across the load.
The output voltage is regulated by modulating the PFET
switch on time to control the average current sent to the load.
The effect is identical to sending a duty-cycle modulated rect-
angular wave formed by the switch and synchronous rectifier
at SW to a low-pass filter formed by the inductor and output
filter capacitor. The output voltage is equal to the average
voltage at the SW pin.
While in operation, the output voltage is regulated by switch-
ing at a constant frequency and then modulating the energy
per cycle to control power to the load. Energy per cycle is set
by modulating the PFET switch on-time pulse width to control
the peak inductor current. This is done by comparing the sig-
nal from the current-sense amplifier with a slope compensat-
ed error signal from the voltage-feedback error amplifier. At
the beginning of each cycle, the clock turns on the PFET
switch, causing the inductor current to ramp up. When the
current sense signal ramps past the error amplifier signal, the
PWM comparator turns off the PFET switch and turns on the
NFET synchronous rectifier, ending the first part of the cycle.
If an increase in load pulls the output down, the error amplifier
output increases, which allows the inductor current to ramp
higher before the comparator turns off the PFET. This in-
creases the average current sent to the output and adjusts for
the increase in the load.
OUT
IN
- V
/ L. The output filter capacitor stores charge
OUT
) / L, by storing energy in a magnetic field.
FIGURE 3. Typical Operating System Circuit
12
Before appearing at the PWM comparator, a slope compen-
sation ramp from the oscillator is subtracted from the error
signal for stability of the current feedback loop. The minimum
on time of PFET is 50ns (typ.)
Shutdown Mode
Setting the EN digital pin low (<0.5V) places the LM3205 in a
0.01µA (typ.) Shutdown mode. During shutdown, the PFET
switch, NFET synchronous rectifier, reference voltage
source, control and bias circuitry of the LM3205 are turned
off. Setting EN high (>1.2V) enables normal operation.
EN should be set low to turn off the LM3205 during power-up
and under voltage conditions when the power supply is less
than the 2.7V minimum operating voltage. The LM3205 is de-
signed for compact portable applications, such as mobile
phones. In such applications, the system controller deter-
mines power supply sequencing and requirements for small
package size outweigh the additional size required for inclu-
sion of UVLO (Under Voltage Lock-Out) circuitry.
Internal Synchronous Rectification
While in PWM mode, the LM3205 uses an internal NFET as
a synchronous rectifier to reduce rectifier forward voltage
drop and associated power loss. Synchronous rectification
provides a significant improvement in efficiency whenever the
output voltage is relatively low compared to the voltage drop
across and ordinary rectifier diode.
With medium and heavy loads, the internal NFET syn-
chronous rectifier is turned on during the inductor current
down slope in the second part of each cycle. The synchronous
rectifier is turned off prior to the next cycle. The NFET is de-
signed to conduct through its intrinsic body diode during
transient intervals before it turns on, eliminating the need for
an external diode.
Current Limiting
A current limit feature allows the LM3205 to protect itself and
external components during overload conditions. In PWM
mode, an 1200mA (max.) cycle-by-cycle current limit is nor-
mally used. If an excessive load pulls the output voltage down
to approximately 0.375V, then the device switches to a timed
current limit mode. In timed current limit mode the internal
PFET switch is turned off after the current comparator trips
and the beginning of the next cycle is inhibited for 3.5us to
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