C8051F120DK Silicon Laboratories Inc, C8051F120DK Datasheet - Page 29

• Manufacturer Part Number: C8051F120DK
• Description: DEVKIT-F120/21/22/23/24/25/26/27
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F120DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F12x and C8051F13x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F120
• Silicon Family Name: C8051F12x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F120, 121, 122, 123, 124, 125, 126, 127
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1224

1.2.
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The lower 128 bytes of
RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as four banks of
general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
The devices include an on-chip 8k byte RAM block and an external memory interface (EMIF) for accessing
off-chip data memory. The on-chip 8k byte block can be addressed over the entire 64k external data mem-
ory address range (overlapping 8k boundaries). External data memory address space can be mapped to
on-chip memory only, off-chip memory only, or a combination of the two (addresses up to 8k directed to on-
chip, above 8k directed to EMIF). The EMIF is also configurable for multiplexed or non-multiplexed
address/data lines.
On the C8051F12x and C8051F130/1, the MCU’s program memory consists of 128 k bytes of banked
Flash memory. The 1024 bytes from addresses 0x1FC00 to 0x1FFFF are reserved. On the C8051F132/3,
the MCU’s program memory consists of 64 k bytes of Flash memory. This memory may be reprogrammed
in-system in 1024 byte sectors, and requires no special off-chip programming voltage.
On all devices, there are also two 128 byte sectors at addresses 0x20000 to 0x200FF, which may be used
by software for data storage. See Figure 1.8 for the MCU system memory map.
On-Chip Memory
0x1FBFF
0x1FFFF
0x1FC00
0x0FFFF
0x200FF
0x200FF
0x20000
0x20000
0x00000
0x00000
PROGRAM/DATA MEMORY
C8051F120/1/2/3/4/5/6/7
Programmable in 1024
Programmable in 1024
(FLASH)
Scrachpad Memory
Scrachpad Memory
C8051F130/1
C8051F132/3
Byte Sectors)
Byte Sectors)
(DATA only)
RESERVED
(DATA only)
(In-System
(In-System
FLASH
FLASH
Figure 1.8. On-Chip Memory Map
Rev. 1.4
(Indirect Addressing
(Direct and Indirect
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
Registers
EXTERNAL DATA ADDRESS SPACE
0xFFFF
0x1FFF
0x2000
0x0000
INTERNAL DATA ADDRESS SPACE
Only)
C8051F120/1/2/3/4/5/6/7
DATA MEMORY (RAM)
XRAM - 8192 Bytes
(accessable using MOVX
Off-chip XRAM space
instruction)
(Direct Addressing Only)
C8051F130/1/2/3
Lower 128 RAM
(Direct and Indirect
Addressing)
Special Function
Registers
0
256 SFR Pages
1
2
3
Up To
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