CT-161-CD Fujitsu Semiconductor America Inc, CT-161-CD Datasheet - Page 48

KIT 16LX FOR MB90F387

CT-161-CD

Manufacturer Part Number
CT-161-CD
Description
KIT 16LX FOR MB90F387
Manufacturer
Fujitsu Semiconductor America Inc
Series
F²MC-16LXr
Type
MCUr
Datasheets

Specifications of CT-161-CD

Contents
Board, Cable, CD
For Use With/related Products
MB90F387S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
865-1103

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CT-161-CD
Manufacturer:
Fujitsu Semiconductor America
Quantity:
135
48
MB90385 Series
10. 8/10-bit A/D Converter
*: When operating with 16-MHz machine clock
Singular conversion
mode
Sequential conversion
mode
Pausing conversion
mode
Functions of 8/10-bit A/D converter
8/10-bit A/D converter conversion mode
The 8/10-bit A/D converter converts an analog input voltage into 8-bit or 10/bit digital value, using the RC-type
successive approximation conversion method.
• Input signal is selected among 8 channels of analog input pins.
• Activation trigger is selected among software trigger, internal timer output, and external trigger.
The 8/10-bit A/D converter converts an analog voltage (input voltage) input to analog input pin into an 8-bit or
10-bit digital value (A/D conversion).
The 8/10-bit A/D converter has the following functions:
• A/D conversion takes a minimum of 6.12 s* for 1 channel, including sampling time. (A/D conversion)
• Sampling of one channel takes a minimum of 2.0 s*.
• RC-type successive approximation conversion method, with sample & hold circuit is used for conversion.
• Resolution of either 8 bits or 10 bits is specifiable.
• A maximum of 8 channels of analog input pins are allowed for use.
• Generation of interrupt request is allowed, by storing A/D conversion result in A/D data register.
• Activation of EI
• An activation trigger is selectable among software trigger, internal timer output, and external trigger (fall edge).
Conversion mode
even if A/D conversion is performed successively.
2
OS is allowed upon occurrence of an interrupt request. With use of EI
The A/D conversion is performed form a start channel to an end channel sequentially.
Upon completion of A/D conversion on an end channel, A/D conversion function stops.
The A/D conversion is performed form a start channel to an end channel sequentially.
Upon completion of A/D conversion on an end channel, A/D conversion function re-
sumes from the start channel.
The A/D conversion is performed by pausing at each channel. Upon completion of A/D
conversion on an end channel, A/D conversion and pause functions resume from the
start channel.
Description
2
OS, data loss is avoided

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