C8051F064EK Silicon Laboratories Inc, C8051F064EK Datasheet - Page 10

KIT EVAL FOR C8051F064

C8051F064EK

Manufacturer Part Number
C8051F064EK
Description
KIT EVAL FOR C8051F064
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F064EK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F064
Silicon Family Name
C8051F06x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F064
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1219
C8051F060/1/2/3/4/5/6/7
6. Direct Memory Access Interface (DMA0) ............................................................. 75
7. 10-Bit ADC (ADC2, C8051F060/1/2/3).................................................................... 87
10
Figure 5.17. ADC1L: ADC1 Data Word LSB Register.............................................. 65
Figure 5.18. ADC1 Data Word Example................................................................... 65
Figure 5.19. Calibration Coefficient Locations.......................................................... 66
Figure 5.20. Offset and Gain Register Mapping ....................................................... 67
Figure 5.21. Offset and Gain Calibration Block Diagram.......................................... 67
Figure 5.22. ADC0CPT: ADC Calibration Pointer Register ...................................... 68
Figure 5.23. ADC0CCF: ADC Calibration Coefficient Register ................................ 68
Figure 5.24. ADC0GTH: ADC0 Greater-Than Data High Byte Register .................. 69
Figure 5.25. ADC0GTL: ADC0 Greater-Than Data Low Byte Register.................... 69
Figure 5.26. ADC0LTH: ADC0 Less-Than Data High Byte Register........................ 70
Figure 5.27. ADC0LTL: ADC0 Less-Than Data Low Byte Register ......................... 70
Figure 5.28. 16-Bit ADC0 Window Interrupt Example: Single-Ended Data .............. 71
Figure 5.29. 16-Bit ADC0 Window Interrupt Example: Differential Data .................. 72
Figure 6.1. DMA0 Block Diagram............................................................................. 75
Figure 6.2. DMA Mode 0 Operation ......................................................................... 77
Figure 6.3. DMA Mode 1 Operation ......................................................................... 78
Figure 6.4. DMA0CN: DMA0 Control Register ......................................................... 80
Figure 6.5. DMA0CF: DMA0 Configuration Register................................................ 81
Figure 6.6. DMA0IPT: DMA0 Instruction Write Address Register ............................ 82
Figure 6.7. DMA0IDT: DMA0 Instruction Write Data Register ................................. 82
Figure 6.8. DMA0BND: DMA0 Instruction Boundary Register ................................. 83
Figure 6.9. DMA0ISW: DMA0 Instruction Status Register ....................................... 83
Figure 6.10. DMA0DAH: DMA0 Data Address Beginning MSB Register................. 84
Figure 6.11. DMA0DAL: DMA0 Data Address Beginning LSB Register .................. 84
Figure 6.12. DMA0DSH: DMA0 Data Address Pointer MSB Register ..................... 84
Figure 6.13. DMA0DSL: DMA0 Data Address Pointer LSB Register ....................... 84
Figure 6.14. DMA0CTH: DMA0 Repeat Counter Limit MSB Register...................... 85
Figure 6.15. DMA0CTL: DMA0 Repeat Counter Limit LSB Register ....................... 85
Figure 6.16. DMA0CSH: DMA0 Repeat Counter MSB Register .............................. 85
Figure 6.17. DMA0CSL: DMA0 Repeat Counter LSB Register................................ 85
Figure 7.1. ADC2 Functional Block Diagram............................................................ 87
Figure 7.2. Temperature Sensor Transfer Function ................................................. 89
Figure 7.3. 10-Bit ADC Track and Conversion Example Timing .............................. 90
Figure 7.4. ADC2 Equivalent Input Circuits.............................................................. 91
Figure 7.5. AMX2CF: AMUX2 Configuration Register ............................................. 92
Figure 7.6. AMX2SL: AMUX2 Channel Select Register........................................... 93
Figure 7.7. ADC2CF: ADC2 Configuration Register ................................................ 94
Figure 7.8. ADC2H: ADC2 Data Word MSB Register .............................................. 95
Figure 7.9. ADC2L: ADC2 Data Word LSB Register................................................ 95
Figure 7.10. ADC2CN: ADC2 Control Register ........................................................ 96
Figure 7.11. ADC2GTH: ADC2 Greater-Than Data High Byte Register .................. 97
Figure 7.12. ADC2GTL: ADC2 Greater-Than Data Low Byte Register.................... 97
Figure 7.13. ADC2LTH: ADC2 Less-Than Data High Byte Register........................ 98
Rev. 1.2

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