C8051T600DK Silicon Laboratories Inc, C8051T600DK Datasheet - Page 160

• Manufacturer Part Number: C8051T600DK
• Description: KIT DEV FOR C8051T60X MCU'S
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051T600DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051T60x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051T600, C8051T601, C8051T602, C8051T603, C8051T604, C8051T605
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1404

C8051T600/1/2/3/4/5/6
26. Programmable Counter Array
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer
and three 16-bit Capture/Compare modules. Each Capture/Compare module has its own associated I/O
line (CEXn) which is routed through the Crossbar to Port I/O when enabled. The counter/timer is driven by
a programmable timebase that can select between six sources: system clock, system clock divided by four,
system clock divided by twelve, the external oscillator clock source divided by eight, Timer 0 overflows, or
an external clock signal on the ECI input pin. Each Capture/Compare module may be configured to oper-
ate independently in one of six modes: Edge-Triggered Capture, Software Timer, High-Speed Output, Fre-
quency Output, 8-Bit PWM, or 16-Bit PWM (each mode is described in Section “26.3. Capture/Compare
Modules” on page 163). The external oscillator clock option is ideal for real-time clock (RTC) functionality,
allowing the PCA to be clocked by a precision external oscillator while the internal oscillator drives the sys-
tem clock. The PCA is configured and controlled through the system controller's Special Function Regis-
ters. The PCA block diagram is shown in Figure 26.1
Important Note: The PCA Module 2 may be used as a Watchdog Timer (WDT), and is enabled in this
mode following a system reset. Access to certain PCA registers is restricted while WDT mode is
enabled. See Section 26.4 for details.
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Figure 26.1. PCA Block Diagram
Capture/Compare
Module 0
SYSCLK/12
Timer 0 Overflow
SYSCLK
External Clock/8
SYSCLK/4
ECI
Crossbar
Port I/O
Rev. 1.2
Capture/Compare
Module 1
CLOCK
MUX
PCA
16-Bit Counter/Timer
Capture/Compare
Module 2 / WDT