C8051F020-TB Silicon Laboratories Inc, C8051F020-TB Datasheet - Page 36
![BOARD PROTOTYPING W/C8051F020](/photos/28/94/289414/tqfp-100_sml.jpg)
C8051F020-TB
Manufacturer Part Number
C8051F020-TB
Description
BOARD PROTOTYPING W/C8051F020
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F020-TB
Contents
Board
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F020
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F020/1/2/3
36
AD6/D6/P3.6/IE6
AD7/D7/P3.7/IE7
A14m/A6/P2.6
A15m/A7/P2.7
AD0/D0/P3.0
AD1/D1/P3.1
AD2/D2/P3.2
AD3/D3/P3.3
AD4/D4/P3.4
AD5/D5/P3.5
ALE/P4.5
/WR/P4.7
/RD/P4.6
A10/P5.2
A8/P5.0
A9/P5.1
Name
P4.0
P4.1
P4.2
P4.3
P4.4
F020
F022
Pin Numbers
40
39
54
53
52
51
50
49
48
47
98
97
96
95
94
93
92
91
88
87
86
F021
F023
31
30
47
46
45
44
43
42
39
38
D I/O Port 2.6. See Port Input/Output section for complete description.
D I/O Port 2.7. See Port Input/Output section for complete description.
D I/O Bit 0 External Memory Address/Data bus (Multiplexed mode)
D I/O Port 3.1. See Port Input/Output section for complete description.
D I/O Port 3.2. See Port Input/Output section for complete description.
D I/O Port 3.3. See Port Input/Output section for complete description.
D I/O Port 3.4. See Port Input/Output section for complete description.
D I/O Port 3.5. See Port Input/Output section for complete description.
D I/O Port 3.6. See Port Input/Output section for complete description.
D I/O Port 3.7. See Port Input/Output section for complete description.
D I/O Port 4.0. See Port Input/Output section for complete description.
D I/O Port 4.1. See Port Input/Output section for complete description.
D I/O Port 4.2. See Port Input/Output section for complete description.
D I/O Port 4.3. See Port Input/Output section for complete description.
D I/O Port 4.4. See Port Input/Output section for complete description.
D I/O ALE Strobe for External Memory Address bus (multiplexed mode)
D I/O /RD Strobe for External Memory Address bus
D I/O /WR Strobe for External Memory Address bus
D I/O Bit 8 External Memory Address bus (Non-multiplexed mode)
D I/O Port 5.1. See Port Input/Output section for complete description.
D I/O Port 5.2. See Port Input/Output section for complete description.
Type
Table 4.1. Pin Definitions
Description
Bit 0 External Memory Data bus (Non-multiplexed mode)
Port 3.0
See Port Input/Output section for complete description.
Port 4.5
See Port Input/Output section for complete description.
Port 4.6
See Port Input/Output section for complete description.
Port 4.7
See Port Input/Output section for complete description.
Port 5.0
See Port Input/Output section for complete description.
Rev. 1.4
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