C8051F120-TB Silicon Laboratories Inc, C8051F120-TB Datasheet - Page 117

• Manufacturer Part Number: C8051F120-TB
• Description: BOARD PROTOTYPING W/C8051F120
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F120-TB

• Contents: Board
• Processor To Be Evaluated: C8051F12x and C8051F13x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F120
• Silicon Family Name: C8051F12x
• Kit Contents: Board
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F120
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.3.
On the C8051F130/1/2/3 devices, the VREF0 pin provides a voltage reference input for ADC0, which can
be connected to an external precision reference or the internal voltage reference, as shown in Figure 9.3.
The REF0CN register for the C8051F130/1/2/3 is described in SFR Definition 9.3.
Bits7–5: UNUSED. Read = 000b; Write = don’t care.
Bits4–3: Reserved: Must be written to 0.
Bit2:
Bit1:
Bit0:
SFR Page:
SFR Address:
Figure 9.3. Voltage Reference Functional Block Diagram (C8051F130/1/2/3)
R/W
Bit7
-
Reference Configuration on the C8051F130/1/2/3
SFR Definition 9.3. REF0CN: Reference Control (C8051F130/1/2/3)
TEMPE: Temperature Sensor Enable Bit.
0: Internal Temperature Sensor Off.
1: Internal Temperature Sensor On.
BIASE: ADC/DAC Bias Generator Enable Bit. (Must be ‘1’ if using ADC or VREF).
0: Internal Bias Generator Off.
1: Internal Bias Generator On.
REFBE: Internal Reference Buffer Enable Bit.
0: Internal Reference Buffer Off.
1: Internal Reference Buffer On. Internal voltage reference is driven on the VREF pin.
0
0xD1
R/W
Bit6
Reference
-
External
Voltage
Circuit
DGND
VDD
Recommended Bypass
4.7F
R/W
Bit5
R1
-
Capacitors
+
Reserved Reserved
0.1F
R/W
Bit4
VREF0
VREF
Rev. 1.4
R/W
Bit3
C8051F120/1/2/3/4/5/6/7
REF0CN
x2
Ref
ADC0
TEMPE
R/W
Bit2
Band-Gap
C8051F130/1/2/3
Bias to ADC
1.2V
EN
BIASE
R/W
Bit1
REFBE
R/W
Bit0
00000000
Reset Value
117