MSC8144AMC-SA Freescale Semiconductor, MSC8144AMC-SA Datasheet - Page 49

• Manufacturer Part Number: MSC8144AMC-SA
• Description: BOARD AMC SGL WIDTH MSC8144 DSP
• Manufacturer: Freescale Semiconductor
• Type: DSPr

Specifications of MSC8144AMC-SA

• Contents: Board
• For Use With/related Products: MSC8144
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.6.5.6
For each baud rate at which an LP-Serial receiver is specified to operate, the receiver shall meet the corresponding bit error rate
specification
falls entirely within the unshaded portion of the receiver input compliance mask shown in
specified in
device replaced with a 100 Ω
2.6.5.7
Since the LP-Serial electrical specification are guided by the XAUI electrical interface specified in Clause 47 of IEEE Std.
802.3ae-2002™, the measurement and test requirements defined here are similarly guided by Clause 47. In addition, the CJPAT
test pattern defined in Annex 48A of IEEE Std. 802.3ae-2002 is specified as the test pattern for use in eye pattern and jitter
measurements. Annex 48B of IEEE Std. 802.3ae-2002 is recommended as a reference for additional information on jitter test
methods.
Freescale Semiconductor
1.25 GBaud
2.5 GBaud
3.125 GBaud
Table
–V
–V
Table 35. Receiver Input Compliance Mask Parameters Exclusive of Sinusoidal Jitter
(Table
V
V
DIFF
DIFF
DIFF
DIFF
Receiver Eye Diagrams
Measurement and Test Requirements
35. The eye pattern of the receiver test signal is measured at the input pins of the receiving device with the
max
min
min
max
32,
Receiver Type
0
Table
0
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
±
33, and
5% differential resistive load.
Figure 14. Receiver Input Compliance Mask
Table
34) when the eye pattern of the receiver test signal (exclusive of sinusoidal jitter)
A
V
DIFF
B
min (mV)
100
100
100
Time (UI)
1 – B
V
DIFF
max (mV)
800
800
800
1 – A
Figure 14
Electrical Characteristics
with the parameters
A (UI)
0.275
0.275
0.275
1
B (UI)
0.400
0.400
0.400
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