MSC8144AMC-SA Freescale Semiconductor, MSC8144AMC-SA Datasheet - Page 67

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MSC8144AMC-SA

Manufacturer Part Number
MSC8144AMC-SA
Description
BOARD AMC SGL WIDTH MSC8144 DSP
Manufacturer
Freescale Semiconductor
Type
DSPr
Datasheet

Specifications of MSC8144AMC-SA

Contents
Board
For Use With/related Products
MSC8144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.3
When laying out the system board, use the following guidelines:
Note:
3.4
Note:
First, select the pin multiplexing mode to allocate the required I/O signals. Then use the guidelines presented in the following
subsections for board design and connections. The following conventions are used in describing the connectivity requirements:
Note:
3.4.1
This section discusses the various scenarios that can be used with DDR1 and DDR2 memory.
Note:
3.4.1.1
Freescale Semiconductor
MDQ[0–31]
MDQS[0–3]
MDQS[0–3]
MA[0–15]
MCK[0–2]
MCK[0–2]
MCS[0–1]
1.
2.
3.
4.
5.
Keep clock and timing signal paths as short as possible and route with 50 Ω impedance.
Use a serial termination resistor placed close to the clock buffer to minimize signal reflection. Use the following
equation to compute the resistor value:
Rterm = Rim – Rbuf
where Rim = trace characteristic impedance
See MSC8144 CLKIN and PCI_CLK_IN Board Layout (AN3440) for an example layout.
Although the package actually uses a ball grid array, the more conventional term pin is used to denote signal
connections in this discussion.
GND indicates using a 10 kΩ pull-down resistor (recommended) or a direct connection to the ground plane. Direct
connections to the ground plane may yield DC current up to 50mA through the I/O supply that adds to overall power
consumption.
V
Direct connections to the supply may yield DC current up to 50mA through the I/O supply that adds to overall power
consumption.
Mandatory use of a pull-up or pull-down resistor it is clearly indicated as “pull-up/pull-down”.
NC indicates “not connected” and means do not connect anything to the pin.
The phrase “in use” indicates a typical pin connection for the required function.
Please see recommendations #1 and #2 as mandatory pull-down or pull-up connection for unused pins in case of
subset interface connection.
For information about unused differential/non-differential pins in DDR1/DDR2 modes (that is, unused negative lines
of strobes in DDR1), please refer to
DD
Clock and Timing Signal Board Layout Considerations
Connectivity Guidelines
indicates using a 10 kΩ pull-up resistor (recommended) or a direct connection to the appropriate power supply.
DDR Memory Related Pins
Table 51. Connectivity of DDR Related Pins When the DDR Interface Is Not Used
Rbuf = clock buffer internal impedance.
DDR Interface Is Not Used
Signal Name
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Table
51.
Pin Connection
Hardware Design Considerations
NC
NC
NC
NC
NC
NC
NC
67

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