M5271EVB Freescale Semiconductor, M5271EVB Datasheet - Page 18

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M5271EVB

Manufacturer Part Number
M5271EVB
Description
BOARD EVAL FOR MCF5270/71
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of M5271EVB

Processor To Be Evaluated
MCF5271
Interface Type
RS-232, Ethernet
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Electrical Characteristics
7.2
The below table lists thermal resistance values.
18
The average chip-junction temperature (T
Where:
1
2
3
4
5
Junction to ambient, natural convection
Junction to ambient (@200 ft/min)
Junction to board
Junction to case
Junction to top of package
Maximum operating junction temperature
θ
Motorola recommends the use of θ
device junction temperatures from exceeding the rated specification. System designers should be aware that
device junction temperatures can be significantly influenced by board layout and surrounding devices.
Conformance to the device junction temperature specification can be verified by physical measurement in the
customer’s system using the Ψ
EIA/JESD Standard 51-2.
Per JEDEC JESD51-6 with the board horizontal.
Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8.
Board temperature is measured on the top surface of the board near the package.
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL
SPEC-883 Method 1012.1).
Thermal characterization parameter indicating the temperature difference between package top and the
junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal
characterization parameter is written in conformance with Psi-JT.
Thermal Characteristics
JMA
2
3
4
5
and Ψ
This device contains circuitry protecting against damage due to high static voltage or
electrical fields; however, it is advised that normal precautions be taken to avoid application of
any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of
operation is enhanced if unused inputs are tied to an appropriate logic voltage level (e.g.,
either V
Input must be current limited to the value specified. To determine the value of the required
current-limiting resistor, calculate resistance values for positive and negative clamp voltages,
then use the larger of the two values.
All functional non-supply pins are internally clamped to V
Power supply must maintain regulation within operating OV
and operating maximum current conditions. If positive injection current (V
than I
going out of regulation. Insure external OV
injection current. This will be the greatest risk when the processor is not consuming power
(ex; no clock).Power supply must maintain regulation within operating OV
instantaneous and operating maximum current conditions.
jt
parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection.
DD
SS
, the injection current may flow out of OV
MCF5271 Integrated Microprocessor Hardware Specification, Rev. 4
or OV
DD
Characteristic
).
jt
parameter, the device power dissipation, and the method described in
Table 8. Thermal Characteristics
JmA
T
J
and power dissipation specifications in the system design to prevent
=
T
Four layer board (2s2p)
Four layer board (2s2p)
A
+
J
(
) in °C can be obtained from:
P
D
DD
×
Θ
load will shunt current greater than maximum
JMA
DD
)
and could result in external power supply
(1)
SS
DD
and OV
Symbol
range during instantaneous
θ
θ
θ
θ
Ψ
JMA
JMA
T
JC
JB
jt
j
DD
.
MAPBGA
in
DD
32
29
> OV
196
2
104
20
10
1,5
range during
1,2
1,2
3
4
DD
) is greater
Freescale Semiconductor
160QFP
40
36
105
25
10
2
1,5
1,2
1,2
3
4
°C / W
°C / W
°C / W
°C / W
°C / W
Unit
o
C

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