HS7705KCM01H Renesas Electronics America, HS7705KCM01H Datasheet - Page 223

• Manufacturer Part Number: HS7705KCM01H
• Description: ON CHIP DEBUG EMULATOR
• Manufacturer: Renesas Electronics America

Specifications of HS7705KCM01H

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Note: Do not break the user program when the /RESETP and /WAIT signals are being low.
The DMAC operates even when the emulator is used. When a data transfer request is generated,
the DMAC executes DMA transfer.
When a memory is accessed from the memory window, etc. during user program execution, the
user program is resumed after it has stopped in the E10A emulator to access the memory.
Therefore, realtime emulation cannot be performed.
The stopping time of the user program is as follows:
Environment:
When a one-byte memory is read from the command-line window, the stopping time will be about
20 ms.
The emulator can download the program for the flash memory area. Other memory write
operations are enabled for the RAM area. Therefore, an operation such as memory write or
BREAKPOINT should be set only for the RAM area.
When cache is enabled, the emulator accesses the memory by the following methods:
Therefore, when memory read or write is performed during user program break, the cache state
will be changed.
Direct Memory Access Controller (DMAC)
Memory Access during User Program Execution
Memory Access during User Program Break
Cache Operation during User Program Break
Host computer: 650 MHz (Pentium
SH7705: 20 MHz (CPU clock) (mode 0. FRQCR = H’1003, 20-MHz input clock)
JTAG clock: 3.75 MHz
At memory write: Writes through the cache, then writes to the memory.
At memory read: Does not change the cache write mode that has been set.
A TIMEOUT error will occur. If the /WAIT signal is fixed to low during break, a
TIMEOUT error will occur at memory access.
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