HS7760KCI02H Renesas Electronics America, HS7760KCI02H Datasheet - Page 223

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HS7760KCI02H

Manufacturer Part Number
HS7760KCI02H
Description
ON CHIP DEBUG EMULATOR W/TRACE
Manufacturer
Renesas Electronics America
Datasheets

Specifications of HS7760KCI02H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
8. Interrupt
9. Memory Access during User Program Break
10. Cache Operation during User Program Break
11. Session files
The stopping time of the user program is as follows:
Environment:
When a one-byte memory is read from the command-line window, the stopping time will be
about 8 ms.
When the NMIB bit in the ICR register is 1, the NMI interrupt is accepted during break and
the program is executed from the NMI interrupt vector. If the program cannot return normally
from the NMI interrupt routine or the value in the general-purpose register is not guaranteed, a
Communication timeout error will occur.
The emulator can download the program for the flash memory area. Other memory write
operations are enabled for the RAM area. Therefore, an operation such as memory write,
BREAKPOINT, or user program download should be set only for the RAM area. When the
memory area can be written by the MMU, do not perform memory write, BREAKPOINT, or
downloading.
When cache is enabled, the emulator accesses the memory by the following methods:
Therefore, when memory read or write is performed during user program break, the cache
state will be changed.
There are three kinds of session files: HDI session files (*.hds), target session files (*.hdt), and
watch session files (*.hdw). For details on HDI session files and watch session files, refer to
the Hitachi Debugging Interface User’s Manual attached with the CD-R. The following
information will be saved as target session file information of the emulator:
[Break point] dialog box
[Break Condition] dialog box
[Trace Acquisition] dialog box
[Configuration] dialog box (except for Jtag Clock)
[Profile Select Data] dialog box
At memory write: Writes through the cache, then writes to the memory.
At memory read: Does not change the cache write mode that has been set.
Host computer: 1 GHz (Pentium
OS: Windows
SH7760: 200 MHz (CPU clock)
JTAG clock: 16.5 MHz
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