DK-SI-2SGX90N Altera, DK-SI-2SGX90N Datasheet - Page 30

• Manufacturer Part Number: DK-SI-2SGX90N
• Description: SI KIT W/SII GX EP2SGX90N
• Manufacturer: Altera
• Series: Stratix® IIr
• Type: DSPr

Specifications of DK-SI-2SGX90N

• Contents: Dev Board, Quartus®II Web Edition, Cables, Accessories, Reference Designs and Demos
• For Use With/related Products: Stratix ll GX 2SGX90N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1724

General User Interfaces
General User
Interfaces
A–2
Transceiver Signal Integrity Development Kit, Stratix II GX Edition
1
2
3
4
5
6
7
Number
Table A–1. LED Display (Part 1 of 2)
Tx_pll_locked
Rx_syncstatus
Checker_synced
Error_flag
Error
status_first_digit
(1)
Error
status_second_digit
(1)
Error
status_third_digit
(1)
Signal Name
This section describes the following general user interfaces, which
provide direct feedback regarding board, clocking, and signal activity:
■
■
■
■
LED Display
Signals propagating to LEDs indicate board status.
signal name, description, width, board reference number, and the FPGA
pin in which the signal is connected.
LED display
7-segment display
DIP switches
Push buttons
Shows whether the TX phase-locked
loop (PLL) is locked to the input clock
When ON, indicates that the receiver
has acquired synchronization with the
input data.
Indicates that the checker is checking
for errors on the received data.
The LED is ON for one second when
an error is detected by the pattern
checker. Shows the running error
status.
The LED is ON if the LSB[7:0] of the
error counter reaches 0xFF. The LED
is reset when
clear_error_counter_switch is
asserted.
The LED is ON if the LSB[15:8]of
the error counter reaches 0xFF. The
LED is reset when
clear_error_counter_switch is
asserted.
The LED is on if the LSB[23:16] of
the error counter reaches 0xFF. The
LED is reset when
clear_error_counter_switch is
asserted.
Getting Started User Guide
Description
1
1
1
1
1
1
1
Width
D1
D2
D3
D4
D5
D6
D7
Reference
Number
Table A–1
Board
Altera Corporation
AE33
AE32
AD26
AD25
AD34
AE34
AC29
to FPGA Pin
lists the
Connected
June 2006
Number