EVAL-ADT7467EBZ ON Semiconductor, EVAL-ADT7467EBZ Datasheet - Page 58

• Manufacturer Part Number: EVAL-ADT7467EBZ
• Description: BOARD EVALUATION FOR ADT7467
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of EVAL-ADT7467EBZ

• Sensor Type: Temperature
• Sensing Range: -40°C ~ 120°C
• Interface: SMBus (2-Wire/I²C)
• Sensitivity: ±1.5°C
• Voltage - Supply: 3 V ~ 5.5 V
• Embedded: No
• Utilized Ic / Part: ADT7467
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADT7467
Approaches to System Acoustic Enhancement
There are two different approaches to implementing system
acoustic enhancement: temperature-centric and fan-centric.
The ADT7467 uses the fan-centric approach.
The temperature-centric approach involves smoothing transient
temperatures as they are measured by a temperature source (for
example, Remote 1 temperature). The temperature values used
to calculate the PWM duty cycle values are smoothed, reducing
fan speed variation. However, this approach causes an inherent
delay in updating fan speed and causes the thermal characteris-
tics of the system to change. It also causes the system fans to run
longer than necessary, because the fan’s reaction is merely
delayed. The user has no control over noise from different fans
driven by the same temperature source. Consider, for example,
a system in which control of a CPU cooler fan (on PWM1) and
a chassis fan (on PWM2) use Remote 1 temperature. Because
the Remote 1 temperature is smoothed, both fans are updated at
exactly the same rate. If the chassis fan is much louder than the
CPU fan, there is no way to improve its acoustics without
changing the thermal solution of the CPU cooling fan.
The fan-centric approach to system acoustic enhancement
controls the PWM duty cycle, driving the fan at a fixed rate (for
example, 6%). Each time the PWM duty cycle is updated, it is
incremented by a fixed 6%. As a result, the fan ramps smoothly
to its newly calculated speed. If the temperature starts to drop,
the PWM duty cycle immediately decreases by 6% at every
update. Therefore, the fan ramps up or down smoothly without
inherent system delay. Consider, for example, controlling the
same CPU cooler fan (on PWM1) and chassis fan (on PWM2)
using Remote 1 temperature. The T
been defined in automatic fan speed control mode; that is,
thermal characterization of the control loop has been
optimized. Now the chassis fan is noisier than the CPU cooling
fan. Using the fan-centric approach, PWM2 can be placed into
acoustic enhancement mode independently of PWM1. The
acoustics of the chassis fan can, therefore, be adjusted without
affecting the acoustic behavior of the CPU cooling fan, even
though both fans are controlled by Remote 1 temperature.
Enabling Acoustic Enhancement for Each PWM Output
Enhanced Acoustics Register 1 (0x62)
<3> = 1 enables acoustic enhancement on PWM1 output.
Enhanced Acoustics Register 2 (0x63)
<7> = 1 enables acoustic enhancement on PWM2 output.
<3> = 1 enables acoustic enhancement on PWM3 output.
MIN
and T
RANGE
settings have
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Effect of Ramp Rate on Enhanced Acoustics Mode
The PWM signal driving the fan has a period, T, given by the
PWM drive frequency, f, because T = 1/f. For a given PWM
period, T, the PWM period is subdivided into 255 equal time
slots. One time slot corresponds to the smallest possible increment
in the PWM duty cycle. A PWM signal of 33% duty cycle is,
therefore, high for 1/3 × 255 time slots and low for 2/3 × 255 time
slots. Therefore, a 33% PWM duty cycle corresponds to a signal
that is high for 85 time slots and low for 170 time slots.
The ramp rates in the enhanced acoustics mode are selectable
from the values 1, 2, 3, 5, 8, 12, 24, and 48. The ramp rates are
discrete time slots. For example, if the ramp rate is 8, eight time
slots are added or subtracted to increase or decrease, respec-
tively, the PWM high duty cycle. Figure 83 shows how the
enhanced acoustics mode algorithm operates.
The enhanced acoustics mode algorithm calculates a new PWM
duty cycle based on the temperature measured. If the new PWM
duty cycle value is greater than the previous PWM value, the
previous PWM duty cycle value is incremented by 1, 2, 3, 5, 8,
12, 24, or 48 time slots, depending on the settings of the enhanced
acoustics registers. If the new PWM duty cycle value is less than
the previous PWM value, the previous PWM duty cycle is
decremented by 1, 2, 3, 5, 8, 12, 24, or 48 time slots. Each time
the PWM duty cycle is incremented or decremented, its value is
stored as the previous PWM duty cycle for the next comparison.
A ramp rate of 1 corresponds to one time slot, which is 1/255 of
the PWM period. In enhanced acoustics mode, incrementing or
decrementing by 1 changes the PWM output by 1/255 × 100%.
PWM_OUT
33% DUTY
CYCLE
Figure 82. 33% PWM Duty Cycle, Represented in Time Slots
Figure 83. Enhanced Acoustics Algorithm
TIME SLOTS
TEMPERATURE
BY RAMP RATE
85
DUTY CYCLE
CALCULATE
IS NEW PWM
PWM VALUE
INCREMENT
NEW PWM
PREVIOUS
PREVIOUS
VALUE >
VALUE?
READ
= 255 TIME SLOTS
YES
PWM OUTPUT
(ONE PERIOD)
NO
TIME SLOTS
170
BY RAMP RATE
DECREMENT
PWM VALUE
PREVIOUS