EVAL-ADT7467EBZ ON Semiconductor, EVAL-ADT7467EBZ Datasheet - Page 64

• Manufacturer Part Number: EVAL-ADT7467EBZ
• Description: BOARD EVALUATION FOR ADT7467
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of EVAL-ADT7467EBZ

• Sensor Type: Temperature
• Sensing Range: -40°C ~ 120°C
• Interface: SMBus (2-Wire/I²C)
• Sensitivity: ±1.5°C
• Voltage - Supply: 3 V ~ 5.5 V
• Embedded: No
• Utilized Ic / Part: ADT7467
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADT7467
Table 24. Register 0x37—Dynamic T
Bit
<2:0>
<5:3>
<7:6>
1
Table 25. Maximum PWM Duty Cycle Registers (Power-On Default = 0xFF)
Register Address
0x38
0x39
0x3A
1
This register becomes a read-only register when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to this register fail.
These registers set the maximum PWM duty cycle of the PWM output.
Name
CYR1
CYL
CYR2
R/W
Read/write
Read/write
Read/write
R/W
Read/write
Read/write
Read/write
Description
3-bit Remote 1 cycle value. These three bits define the delay time, in terms of the number of monitoring
cycles, for making subsequent T
associated with thermal time constants that must be found to optimize the response of the fans and the
control loop.
Bits
000
001
010
011
100
101
110
111
3-bit local temperature cycle value. These three bits define the delay time, in terms of number of monitoring
cycles, for making subsequent T
system is associated with thermal time constants that must be found to optimize the response of the fans
and the control loop.
Bits
000
001
010
011
100
101
110
111
2 LSBs of 3-bit Remote 2 cycle value. The MSB of the 3-bit code resides in dynamic T
(0x36). These three bits define the delay time, in terms of number of monitoring cycles, for making
subsequent T
thermal time constants that must be found to optimize the response of fans and the control loop.
Bits
000
001
010
011
100
101
110
111
MIN
Control Register 2 (Power-On Default = 0x00)
MIN
Description
Maximum duty cycle for PWM1 output, default = 100% (0xFF).
Maximum duty cycle for PWM2 output, default = 100% (0xFF).
Maximum duty cycle for PWM3 output, default = 100% (0xFF).
Decrease (Short) Cycle
8 cycles (1 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
Decrease (Short) Cycle
8 cycles (1 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
Decrease Cycle
8 cycles (1 sec)
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
adjustments in the control loop for the Remote 2 channel. The system is associated with
Rev. 3 | Page 64 of 77 | www.onsemi.com
MIN
MIN
adjustments in the control loop for the Remote 1 channel. The system is
adjustments in the control loop for the local temperature channel. The
1
1
Increase (Long) Cycle
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
2048 cycles (256 sec)
Increase (Long) Cycle
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
2048 cycles (256 sec)
Increase Cycle
16 cycles (2 sec)
32 cycles (4 sec)
64 cycles (8 sec)
128 cycles (16 sec)
256 cycles (32 sec)
512 cycles (64 sec)
1024 cycles (128 sec)
2048 cycles (256 sec)
MIN
Control Register 1