EVAL-ADT7467EBZ ON Semiconductor, EVAL-ADT7467EBZ Datasheet - Page 67

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EVAL-ADT7467EBZ

Manufacturer Part Number
EVAL-ADT7467EBZ
Description
BOARD EVALUATION FOR ADT7467
Manufacturer
ON Semiconductor
Series
dBCool®r
Datasheet

Specifications of EVAL-ADT7467EBZ

Sensor Type
Temperature
Sensing Range
-40°C ~ 120°C
Interface
SMBus (2-Wire/I²C)
Sensitivity
±1.5°C
Voltage - Supply
3 V ~ 5.5 V
Embedded
No
Utilized Ic / Part
ADT7467
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 32. Register 0x55—TACH 1 Minimum High Byte (Power-On Default = 0xFF)
Bit
<4:0>
<7:5>
Table 33. PWM Configuration Registers
Register Address
0x5C
0x5D
0x5E
1
Table 34. Register 0x5C, Register 0x5D, and Register 0x5E—PWM1, PWM2, and PWM3 Configuration Registers
(Power-On Default = 0x82)
Bit
<2:0>
<3>
<4>
<7:5>
1
These registers become read-only registers when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to these registers fail.
These registers become read-only registers when the Configuration Register 1 LOCK bit is set to 1. Any subsequent attempts to write to these registers fail.
Name
SPIN
SLOW
INV
BHVR
Name
Reserved
SCADC
R/W
Read/write
Read/write
Read/write
Read/write
1
Description
These bits control the start-up timeout for PWMx. The PWM output stays high until two valid TACH rising
edges are seen from the fan. If there is not a valid TACH signal during the fan TACH measurement immedi-
ately after the fan start-up timeout period, the TACH measurement reads 0xFFFF and Status Register 2
reflects the fan fault. If the TACH minimum high and low bytes contain 0xFFFF or 0x0000, the Status Register 2
bit is not set, even if the fan has not started.
000 = No start-up timeout
001 = 100 ms
010 = 250 ms (default)
011 = 400 ms
100 = 667 ms
101 = 1 sec
110 = 2 sec
111 = 4 sec
SLOW = 1 makes the ramp rates for acoustic enhancement four times longer.
This bit inverts the PWM output. The default is 0, which corresponds to a logic high output for 100% duty
cycle. Setting this bit to 1 inverts the PWM output so that 100% duty cycle corresponds to a logic low
output.
These bits assign each fan to a particular temperature sensor for localized cooling.
000 = Remote 1 temperature controls PWMx (automatic fan control mode).
001 = local temperature controls PWMx (automatic fan control mode).
010 = Remote 2 temperature controls PWMx (automatic fan control mode).
011 = PWMx runs at full speed.
100 = PWMx disabled (default).
101 = fastest speed calculated by local and Remote 2 temperature controls PWMx.
110 = fastest speed calculated by all three temperature channel controls PWMx.
111 = manual mode. PWM duty cycle registers (0x30 to 0x32) become writable.
R/W
Read only
Read/write
R/W
Read/write
Read/write
Read/write
1
Description
These bits are reserved when Bit 6 of Configuration 2 Register (0x73) is set (single-channel
ADC mode). Otherwise, these bits represent Bits <4:0> of the TACH1 minimum high byte.
When Bit 6 of Configuration 2 Register (0x73) is set (single-channel ADC mode), these bits
are used to select the only channel from which the ADC makes measurements. Otherwise,
these bits represent Bits <7:5> of the TACH1 minimum high byte.
Description
PWM1 configuration.
PWM2 configuration.
PWM3 configuration.
Rev. 3 | Page 67 of 77 | www.onsemi.com
Power-On Default
0x82
0x82
0x82
ADT7467

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